HY62LF16406D Datasheet, PDF (9/11 Pages) Hynix Semiconductor – 256Kx16bit full CMOS SRAM

DATA RETENTION TIMING DIAGRAM 1
VCC
2.3V
DATA RETENTION MODE
tCDR
tR
VIH
VDR
/CS1
VSS
CS1>VCC-0.2V
HY62LF16406D Series
DATA RETENTION TIMING DIAGRAM 2
VCC
2.3V
CS2
VDR
0.4V
VSS
DATA RETENTION MODE
tCDR
tR
CS2<0.2V
Rev.03 / Aug.01
8