HYMD264G726A8M-M Datasheet, PDF (8/16 Pages) Hynix Semiconductor – Low Profile Registered DDR SDRAM DIMM

HYMD264G726A(L)8M-M/K/H/L
DC CHARACTERISTICS II (TA=0 to 70^oC, Voltage referenced to VSS = 0V)
Parameter
Symbol
Test Condition
Speed
Unit Note
-M -K -H -L
Operating Current
IDD0
One bank; Active - Precharge; tRC=tRC(min);
tCK=tCK(min); DQ,DM and DQS inputs
changing twice per clock cycle; address and
control inputs changing once per clock cycle
2135 1955 1955 1910 mA
Operating Current
IDD1
One bank; Active - Read - Precharge; Burst
Length=2; tRC=tRC(min); tCK=tCK(min);
address and control inputs changing once per
clock cycle
2540 2270 2270 2180 mA
Precharge Power Down
Standby Current
IDD2P
All banks idle; Power down mode; CKE=Low,
tCK=tCK(min)
1010
mA
Idle Standby Current
IDD2F
/CS=High, All banks idle; tCK=tCK(min); CKE=
High; address and control inputs changing once 1550 1370 1370 1280 mA
per clock cycle. VIN=VREF for DQ, DQS and DM
Active Power Down
Standby Current
IDD3P
One bank active; Power down mode; CKE=Low,
tCK=tCK(min)
1100
mA
Active Standby Current
/CS=HIGH; CKE=HIGH; One bank; Active-
Precharge; tRC=tRAS(max); tCK=tCK(min); DQ,
IDD3N DM and DQS inputs changing twice per clock 1730 1550 1550 1550 mA
cycle; Address and other control inputs
changing once per clock cycle
Operating Current
IDD4R
Burst=2; Reads; Continuous burst; One bank
active; Address and control inputs changing
once per clock cycle; tCK=tCK (min);
IOUT=0mA
3800 3350 3350 2810
Operating Current
Burst=2; Writes; Continuous burst; One bank
IDD4W
active; Address and control inputs changing
once per clock cycle; tCK=tCK(min); DQ, DM,
3800 3350 3350 2810 ^mA
and DQS inputs changing twice per clock cycle
Auto Refresh Current
IDD5
tRC=tRFC(min) - 8*tCK for DDR200 at 100Mhz,
10*tCK for DDR266A & DDR266B at 133Mhz;
distributed refresh
2960
2690
2690
2555
Self Refresh Current
IDD6
CKE=<0.2V; External clock on;
tCK =tCK(min)
Normal
Low Power
404
377
mA
mA
Operating Current -
Four Bank Operation
IDD7
Four bank interleaving with BL=4 Refer to the
following page for detailed test condition
4025 3845 3845 3620 mA
Rev. 0.2/May. 02
8