HYMD232G726BL8-M Datasheet, PDF (8/16 Pages) Hynix Semiconductor – Registered DDR SDRAM DIMM

HYMD232G726B(L)8-M/K/H/L
DC CHARACTERISTICS II (TA=0 to 70 ^oC, Voltage referenced to VSS = 0V)
Parameter Symbol
Test Condition
Speed
Unit Note
-M -K -H -L
Operating Current
One bank; Active - Precharge; tRC=tRC(min);
IDD0
tCK=tCK(min); DQ,DM and DQS inputs changing
twice per clock cycle; address and control inputs
1730
1640
1640
1550
mA
changing once per clock cycle
Operating Current
IDD1
One bank; Active - Read - Precharge; Burst
Length =2; tRC=tRC(min); tCK=tCK(min);
address and control inputs changing once per
clock cycle
1730 1640 1640 1550 mA
Precharge Power
Down Standby
Current
IDD2P
All banks idle; Power down mode; CKE=Low,
tCK=tCK(min)
740
mA
Idle Standby Current
IDD2F
/CS=High, All banks idle; tCK=tCK(min);
CKE=High
; address and control inputs changing once per
clock cycle. VIN=VREF for DQ, DQS and DM
1100 1055 1055 1010 mA
Active Power Down
Standby Current
IDD3P
One bank active; Power down mode; CKE=Low,
tCK=tCK(min)
785
mA
Active Standby
Current
/CS=HIGH; CKE=HIGH; One bank; Active-
Precharge; tRC=tRAS(max); tCK=tCK(min); DQ,
IDD3N DM and DQS inputs changing twice per clock
1190 1145 1145 1100 mA
cycle; Address and other control inputs changing
once per clock cycle
Operating Current
IDD4R
Burst=2; Reads; Continuous burst; One bank
active; Address and control inputs changing once
per clock cycle; tCK=tCK(min); IOUT=0mA
2180
2000
2000
1910
Operating Current
Burst=2; Writes; Continuous burst; One bank
IDD4W
active; Address and control inputs changing once
per clock cycle; tCK=tCK(min); DQ, DM, and
2270
2180
2180
2090
mA
DQS inputs changing twice per clock cycle
Auto Refresh Current
IDD5
tRC=tRFC(min) - 8*tCK for DDR200 at 100Mhz,
10*tCK for DDR266A & DDR266B at 133Mhz;
distributed refresh
1970
1880
1880
1790
Self Refresh Current
CKE=<0.2V; External clock on;
IDD6 _{tCK =tCK(min)}
Normal
Low Power
377
363.5
mA
mA
Operating Current -
Four Bank Operation
IDD7
Four bank interleaving with BL=4 Refer to the
following page for detailed test condition
3080 2990 2990 2900 mA
Rev. 0.1/Oct. 02
8