HM17CM256 Datasheet, PDF (74/111 Pages) Hynix Semiconductor – 128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM

HM17CM256
BT command : inversion timing selection at line inversion display
BT=”0”: Negative tone display in specified area
BT=”1”: The image of specified area is blinked by every 32 frame.
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Changes per
every 32 frame.
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Display example (BT=”1”)
And be cautious that LREV and BT commands have no influence on dummy segment driver circuit.
And the image selected by COMI₀, COMI₁ is excluded.
HYUNDAI
LCD DRIVER
Low Power and
Low Voltage
Changes per
every 32 frame.
HYUNDAI
LCD DRIVER
Low Power and
Low Voltage
² _{line inversioin start address}
² _{line inversioin end address}
Line inversion display example (LREV=”1”,BT=”1”)
(34-30) Dummy segment driver address selection ( Refer to dummy segment drive related description. )
CS RS RD WR RE₂ RE₁ RE₀
D₇ D₆ D₅ D₄ D₃ D₂ D₁ D₀
0110101
1
001
*
*
* DMY
( reset :{DMY}=0_H, read address :8_H) * : “Don’t care”
When data is to be written to dummy segment driver, this register is active (DMY=”1”).
DMY=”0”: normal display RAM access
DMY=”1”: display data access to dummy segment driver
Normal segment drivers acquire display data from display RAM, but dummy segment drivers acquire
display data from corresponding register not from display RAM. The capacity of register is 4 bytes.
That is correspond to SEGSA₀~SEGSA₃ SEGSB₀~SEGSB₃ SEGSC₀~SEGSC₃ output.
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When accessing with DMY = “1”, address setting is valid by only X address. There is 4 byte capacity,
and so 00_H, 01_H, 02_H, 03_H is valid at 8 bits mode and 00_H, 01_H is valid at 16 bits mode. There is no
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