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HY5DU121622CTP Datasheet, PDF (3/29 Pages) Hynix Semiconductor – 512Mb(32Mx16) GDDR SDRAM
1HY5DU121622CTP
Preliminary
DESCRIPTION
The HY5DU121622CTP is a 536,870,912-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the
main memory applications which requires large memory density and high bandwidth.
This Hynix 512Mb DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the
clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data,
Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are inter-
nally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible
with SSTL_2.
FEATURES
• VDD, VDDQ = 2.5V +/- 0.1V
• All inputs and outputs are compatible with SSTL_2
interface
• Fully differential clock inputs (CK, /CK) operation
• Double data rate interface
• Source synchronous - data transaction aligned to
bidirectional data strobe (DQS)
• x16 device has two bytewide data strobes (UDQS,
LDQS) per each x8 I/O
• Data outputs on DQS edges when read (edged DQ)
Data inputs on DQS centers when write (centered
DQ)
• On chip DLL align DQ and DQS transition with CK
transition
• DM mask write data-in at the both rising and falling
edges of the data strobe
ORDERING INFORMATION
• All addresses and control inputs except data, data
strobes and data masks latched on the rising edges
of the clock
• Programmable /CAS latency 3 supported
• Programmable burst length 2 / 4 / 8 with both
sequential and interleave mode
• Internal four bank operations with single pulsed
/RAS
• Auto refresh and self refresh supported
• tRAS lock out function supported
• 8192 refresh cycles / 64ms
• JEDEC standard 400mil 66pin TSOP-II with 0.65mm
pin pitch
• Full and Half strength driver option controlled by
EMRS
Part No.
Power Supply
HY5DU121622CTP - 4
HY5DU121622CTP - 5
HY5DU121622CTP - 6
VDD/
VDDQ=2.5V
Clock
Frequency
250Mhz
200Mhz
166Mhz
Max Data Rate
500Mbps/pin
400Mbps/pin
333Mbps/pin
Interface Package
SSTL_2
400mil
66pin
TSOP-II
Note) Hynix supports Pb free parts for each speed grade with same specification, except Lead free material.
We'll add "P" character after "T" for Lead free product.
For example, the part number of 200Mhz Lead free product is HY5DU121622CTP-5.
Rev. 0.3 / Apr. 2005
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