GMS90C3X Datasheet, PDF (12/59 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR INC. 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS90 Series
PIN DEFINITIONS AND FUNCTIONS
Symbol
P1.0-P1.7
Pin Number
PLCC-
44
PDIP-
40
MQFP-
44
2-9
1-8 40-44,
1-3
2
1
40
3
2
41
Input/
Output
Function
I/O Port1
Port 1 is an 8-bit bidirectional I/O port with internal
pull-ups. Port 1 pins that have 1s written to them are
pulled high by the internal pull-up resistors and can be
used as inputs. As inputs, port 1 pins that are
externally pulled low will source current because of
the pulls-ups (I_IL, in the DC characteristics). Pins P1.0
and P1.1 also. Port1 also receives the low-order
address byte during program memory verification.
Port1 also serves alternate functions of Timer 2.
P1.0 / T2 : Timer/counter 2 external count input
P1.1 / T2EX : Timer/counter 2 trigger input
2
1
40
In GMS9XC54/56/58:
P1.0 / T2, Clock Out : Timer/counter 2 external count
input, Clock Out
P3.0-P3.7 11,
10-17 5, 7-13 I/O Port 3
13-19
Port 3 is an 8-bit bidirectional I/O port with internal
pull-ups. Port 3 pins that have 1s written to them are
pulled high by the internal pull-up resistors and can be
used as inputs. As inputs, port 3 pins that are
externally pulled low will source current because of
the pulls-ups (IIL, in the DC characteristics). Port 3 also
serves the special features of the 80C51 family, as
listed below.
11
10
5
13
11
7
14
12
8
15
13
9
16
14
10
17
15
11
18
16
12
19
17
13
P3.0 / RxD
P3.1 / TxD
P3.2 /INT0
P3.3 / INT1
P3.4 /T0
P3.5 /T1
P3.6 / WR
P3.7 /RD
receiver data input (asynchronous) or
data input output(synchronous) of serial
interface 0
transmitter data output (asynchronous)
or clock output (synchronous) of the
serial interface 0
interrupt 0 input/timer 0 gate control
interrupt 1 input/timer 1 gate control
counter 0 input
counter 1 input
the write control signal latches the data
byte from port 0 into the external data
memory
the read control signal enables the
external data memory to port 0
XTAL2
20
18
14
O XTAL2
Output of the inverting oscillator amplifier.
8
Oct. 2000 Ver 3.1a