HY5S7B2LF-H Datasheet, PDF (10/52 Pages) Hynix Semiconductor – 512M (16Mx32bit) Mobile SDRAM

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512Mbit (16Mx32bit) Mobile SDR Memory
HY5S7B2LF(P) Series
DC CHARACTERISTICS II (TA= -25 to 85^oC)
Parameter
Symbol
Test Condition
Operating Current
IDD1
Burst length=1, One bank active
tRC ≥ tRC(min), IOL=0mA
Precharge Standby Current ^{IDD2P CKE ≤ VIL(max), tCK = 15ns}
in Power Down Mode
IDD2PS CKE ≤ VIL(max), tCK = ∞
IDD2N
Precharge Standby Current
in Non Power Down Mode
CKE ≥ VIH(min), CS ≥ VIH(min), tCK =
15ns
Input signals are changed one time during
2clks.
All other pins ≥ VDD-0.2V or ≤ 0.2V
IDD2NS
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
Active Standby Current
in Power Down Mode
IDD3P CKE ≤ VIL(max), tCK = 15ns
IDD3PS CKE ≤ VIL(max), tCK = ∞
IDD3N
Active Standby Current
in Non Power Down Mode
CKE ≥ VIH(min), CS ≥ VIH(min), tCK =
15ns
Input signals are changed one time during
2clks.
All other pins ≥ VDD-0.2V or ≤ 0.2V
IDD3NS
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
Burst Mode Operating
Current
IDD4
tCK ≥ tCK(min), IOL=0mA
All banks active
Auto Refresh Current
IDD5 tRFC ≥ tRFC(min),
Self Refresh Current
IDD6 CKE ≤ 0.2V
Standby Current in
Deep Power Down Mode
IDD7
See p.44~45 & 51 ~ 52
Speed
H
S
90
0.3
0.3
10
1.0
5.0
3.0
20
10
85
150
See Next Page
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Unit Note
mA 1
mA
mA
mA
mA
mA
mA 1
mA
mA 2
uA
Note :
1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open
2. See the tables of next page for more specific IDD6 current values.
Rev 1.0 / Jan. 2007
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