HMP351S6AFR8C-Y5 Datasheet, PDF (1/17 Pages) Hynix Semiconductor – 200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 2Gb version A

200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 2Gb version A
This Hynix unbuffered Small Outline Dual In-Line Memory Module (DIMM) series consists of 2Gb version A DDR2
SDRAMs in Fine Ball Grid Array (FBGA) packages on a 200pin glass-epoxy substrate. This Hynix 2Gb version A based
Unbuffered DDR2 SO-DIMM series provide a high performance 8 byte interface in 67.60mm width form factor of indus-
try standard. It is suitable for easy interchange and addition.
FEATURES
• JEDEC standard Double Data Rate 2 Synchronous
DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power
Supply
• All inputs and outputs are compatible with SSTL_1.8
interface
• Posted CAS
• Programmable CAS Latency 3,4,5, and 6
• OCD (Off-Chip Driver Impedance Adjustment) and
ODT (On-Die Termination)
• Programmable Burst Length 4 / 8 with both
sequential and interleave mode
• Auto refresh and self refresh supported
• 8192 refresh cycles / 64ms
• Serial presence detect with EEPROM
• DDR2 SDRAM Package: 60 ball(x4/8)
• 67.60 x 30.00 mm form factor
• RoHS compliant & Halogen-free
• Fully differential clock operations (CK & CK)
* This product is in compliance with the directive pertaining of RoHS.
ORDERING INFORMATION
Part Name
HMP351S6AFR8C-Y5/S5/S6
Density Organization
4GB
512Mx64
# of
DRAMs
16
# of
ranks
2
Materials
Halogen free
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev. 1.0 / Dec. 2009
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