FDN338P Datasheet, PDF (1/4 Pages) Fairchild Semiconductor – P-Channel Logic Level Enhancement Mode Field Effect Transistor

20V P-Channel Enhancement Mode MOSFET
FDN338P
VDS= -20V
RDS(ON), Vgs@-4.5V, Ids@-1.6A= 115mΩ
RDS(ON), Vgs@-2.5V, Ids@-1.3A= 155mΩ
Features
Advanced trench process technology
High Density Cell Design For Ultra Low On-Resistance
Package Dimensions
D
SOT-23(PACKAGE)
G
S
REF.
A
B
C
D
E
F
Millimeter
Min. Max.
2.70 3.10
2.40 2.80
1.40 1.60
0.35 0.50
0
0.10
0.45 0.55
REF.
G
H
K
J
L
M
Millimeter
Min. Max.
1.90
1.00
0.10
0.40
0.85
REF.
1.30
0.20
-
1.15
0° 10°
Maximum Ratings and Thermal Characteristics (TA = 25oC unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current ¹⁾
Maximum Power Dissipation
2)
Operating Junction and Storage Temperature Range
Junction-to-Ambient Thermal Resistance (PCB mounted) ²⁾
Junction-to-Ambient Thermal Resistance (PCB mounted) ³⁾
Symbol
V_DS
V_GS
I_D
I_DM
P_D
T_J, T_stg
R_thJA
Limit
-20
±8
-1.6
-5
0.5
-55 to 150
100
166
Unit
V
A
W
o_C
o_C/W
Notes
1) _{Pulse width limited by maximum junction temperature.}
2) _{Surface Mounted on FR4 Board, t v 5 sec.}
3) Surface Mounted on FR4 Board.
JinYu
semiconductor
www.htsemi.com