HCPL260L Datasheet, PDF (14/14 Pages) Agilent(Hewlett-Packard) – High Speed LVTTL Compatible 3.3 Volt Optocouplers

CMR with Other Drive
Circuits
CMR performance with drive
circuits other than that shown in
Figure 13 may be enhanced by
following these guidelines:
1. Use of drive circuits where
current is shunted from the
LED in the LED off” state (as
shown in Figures 15 and 16).
This is beneficial for good
CMR_H.
2. Use of I _FH > 3.5 mA. This is
good for high CMR_L.
74L504
(ANY
TTL/CMOS
GATE)
V_CC
420 Ω
(MAX)
HCPL-260L
1
2N3906
2
(ANY PNP)
3
LED
4
Figure 15. TTL interface circuit.
Figure 15 shows a circuit which
can be used with any totem-pole-
output TTL/LSTTL/HCMOS logic
gate. The buffer PNP transistor
allows the circuit to be used with
logic devices which have low
current-sinking capability. It also
helps maintain the driving-gate
power-supply current at a
constant level to minimize ground
shifting for other devices
connected to the input-supply
ground.
V_CC
74HC00
(OR ANY
OPEN-COLLECTOR/
OPEN-DRAIN
LOGIC GATE)
HCPL-260L
1
R
2
LED
3
4
When using an open-collector
TTL or open-drain CMOS logic
gate, the circuit in Figure 16 may
be used. When using a CMOS
gate to drive the optocoupler, the
circuit shown in Figure 17 may
be used. The diode in parallel
with the R_LED speeds the turn-off
of the optocoupler LED.
Figure 16. TTL open-collector/open drain gate drive circuit.
V_CC
74HC04
(OR ANY
TOTEM-POLE
OUTPUT LOGIC
GATE)
1N4148
220 Ω
HCPL-260L
1
2
LED
3
4
Figure 17. CMOS gate drive circuit.
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Data subject to change.
Copyright © 2000 Agilent Technologies
5980-2523EN (11/00)
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