HMR3300 Datasheet, PDF (10/11 Pages) Honeywell Solid State Electronics Center – Digital Compass Solutions

HMR3200/3300
Synchronous Communication Protocol
The HMR3200/HMR3300 module controls the synchronous clock (SCK) and synchronous data output (SDO) pins and the
host controller controls synchronous data input (SDI) and chip select (CS) pins. The host controller shall lower the HMR
module’s CS pin for at least 20 microseconds to initiate the SPI communication. In response the HMR module will send
the ASCII bit pattern for 's', and the host shall transmit a valid command character simultaneously. The HMR module will
evaluate the command character received from the host controller and send the appropriate data if the command is
recognized and valid. After transmitting the required data, the HMR module will end the SPI session. If the command is
invalid or was not recognized, then the HMR module will transmit ASCII bit pattern for 'e' and end the SPI session.
SPI Commands
Heading Output: In response to an ASCII H or h command, the HMR3200/HMR3300 shall send two bytes of data. The
MSByte is transmitted first. These two bytes represent the integer value equal to 10*Heading. The MSbit is transmitted
first for each byte. SCK shall be high for 16, and low for 22 microseconds, respectively. There is a 50 microsecond delay
between consecutive bytes transmitted.
Command Character
H or h
Action
Sends heading data
SPI Data Output
0000 to 3599
Parameter Value
Heading: 000.0 to 359.9
Data Representation
Heading Output: In response to an H or h command, HMR3200/HMR3300 module shall send two bytes of data. The
MSByte is transmitted first. These two bytes represent the integer value equal to 10*Heading. The MSbit is transmitted
first for each byte.
SPI Timing
The SCK shall be high for 16, and low for 22 microseconds, respectively. There is a 50 microsecond delay between
consecutive bytes transmitted.
SPI Timing Diagram
CS
SCK
SDO
SPI Heading Output
SDI
MS Byte
10
Th ~ 16µsec
Tl ~ 22µsec
MS bit
LS Byte
Tb = 50µsec
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