HRF-AT4521-FL-TR Datasheet, PDF (1/7 Pages) Honeywell Solid State Electronics Center – 31.0 dB, DC - 2.5GHz, 5 Bit Serial Digital Attenuator

HRF-AT4521
31.0 dB, DC - 2.5GHz, 5 Bit Serial Digital Attenuator
The Honeywell HRF-AT4521 is a 5-bit digital attenuator that is ideal for use in
broadband communication system applications that require accuracy, speed
and low power consumption. The HRF-AT4521 is manufactured with
Honeywell's patented Silicon On Insulator (SOI) CMOS manufacturing
technology, which provides the performance of GaAs with the economy and
integration capabilities of conventional CMOS. These attenuators are DC
coupled to improve lower operating frequency, frequency response and
reduce the number of DC bias points required.
FEATURES
• Very Low DC Power Consumption
• Attenuation In Steps From 1 dB To 31 dB
• Single Positive Power Supply Voltage
• Serial Data Interface
• 50 Ohm Impedance
• DC-coupled, bi-directional RF path
• Space Saving VQFN Surface Mount Packaging
• Lead-free, RoHS compliant and Green
HRF-AT4521 in VQFN Package
RF ELECTRICAL SPECIFICATIONS @ + 25^oC
Results @ V_DD = 5.0 +/- 10%, V_SS = 0 unless otherwise stated, Z₀ = 50 Ohms
Contact Honeywell for relative performance at other supply configurations
Parameter
Insertion Loss
1dB Compression
Input IP3
Input IP3
Return Loss
Attenuation Accuracy
Trise, Tfall
Ton, Toff (Tpd)
T clock Period (Tprd)
Test Condition
Frequency
V_SS = 0V, Input Power
V_SS = - 3V, Input Power
V_SS = 0V
Two-tone inputs, up to +5 dBm
@ 0 dBm attenuation
1.0 GHz
2.0 GHz
2.5 GHz
2.0 GHz
2.0 GHz
2.0 GHz
V_ss = -3V
Two-tone inputs, up to + 5 dBm
@ 0 dBm attenuation
2.0 GHz
Any Combination of Bits
All attenuation states
All attenuation states
All attenuation states
10% To 90%
50% Cntl To 90%/10%RF
1.0 GHz
2.0 GHz
2.5 GHz
T high / T low = ½ minimum clock period
Minimum
Typical
2.0
2.2
2.8
22
28
36
Maximum
2.6
2.8
3.4
>36
-11
-13
+ (0.25 + 2.5 %), - (0.10 + 5.0 %)
+ 0.45, - (0.20 + 8.0 %)
+ 0.35, - (-0.40 + 10.5%)
10
15
50
T data set up (Tsup) Set up to rising edge of clock
5
T data hold (Thld)
Data hold after rising edge of clock
2
T latch set up (Tlsup) Data set up to rising edge of OE
5
Note 1 - For higher accuracy designs, please consider HRF-AT4610/HRF-AT4611
Units
dB
dB
dB
dBm
dBm
dBm
dBm
dB
dB
dB
dB
nS
nS
nS
nS
nS
nS