HI-3210 Datasheet, PDF (20/42 Pages) Holt Integrated Circuits – ARINC 429 DATA MANAGEMENT ENGINE / Octal Receiver / Quad Transmitter

HI-3210
ARINC 429 TRANSMIT OPERATION
The HI-3210 has four on-board ARINC 429 transmit channels which directly drive ARINC 429 differential line drivers
such as the Holt HI-8596. ARINC 429 words may be written to the transmitters either directly, using an SPI instruction,
or be generated automatically using the four ARINC 429 message schedulers.
ARINC 429 Transmit Channel Configuration
Each of the four available ARINC 429 Transmit channels is configured using its own register. Register address 0x8018
controls ARINC 429 Transmit channel #0, register address 0x8019 controls channel #1 and so on. The ATXCn
registers may be written or read at any time.
RUN ^{/HSIT/ OLOPPARITEYV/EDNAS/TKOAIPDD}
ARINC 429 TX CONTROL REGISTER 0 - 3
(Address 0x8018 - 0x801B)
XXX
76543210
MSB
LSB
Bit Name
R/W Default Description
7 RUN / STOP R/W 0 When zero, transmission from this ARINC 429 transmit channel is suspended after the
currently transmitting label is sent. When this bit is taken high, transmission starts at the
beginning of the descriptor table for this channel.
6 HI / LO
R/W 0 Selects the transmission rate for the ARINC 429 transmit channel. A “0” selects high-speed
(100Kb/s) and a “1” selects low-speed (12.5Kb/s).
5 PARITY / DATA R/W 0 When this bit is a one, the 32nd transmitted ARINC bit is overwritten with a parity flag. When
this bit is a zero, all 32-bits are transmitted as data.
4 EVEN / ODD R/W 0 When PARITY / DATA is a “1”, this bit defines whether th 32nd transmitted bit is set for Even or
Odd Parity. A “1” selects even parity and a “0” selects odd parity.
3 SKIP
R/W 0 When set a “1’ instructs the transmit sequencer to wait for the next Repetition Rate Counter
rollover before beginning a new transmission cycle. A “0” causes an immediate restart of the
cycle following completion of the prior cycle.
2-
R/W 0 Not Used
1-
R/W 0 Not Used
0-
R/W 0 Not Used
HOLT INTEGRATED CIRCUITS
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