HI-8482 Datasheet, PDF (1/10 Pages) Holt Integrated Circuits – ARINC 429 DUAL LINE RECEIVER

February 2001
GENERAL DESCRIPTION
The HI-8482 bus interface unit is a silicon gate CMOS de-
vice designed as a dual differential line receiver in accor-
dance with the requirements of the ARINC 429 bus spec-
ification. The device translates incoming ARINC 429 sig-
nals to normal CMOS/TTL levels on each of its two inde-
pendent receive channels. The HI-8482 is also function-
ally equivalent to the Fairchild/Raytheon RM3183.
The self-test inputs force the outputs to either a ZERO,
ONE, or NULL state for system tests. While in self-test
mode, the ARINC inputs are ignored.
All the ARINC inputs have built-in hysteresis to reject
noise that may be present on the ARINC bus. Additional
input noise filtering can also be accomplished with exter-
nal capacitors.
The HI-8482 line receiver is one of several options of-
fered by Holt Integrated Circuits to interface to the ARINC
bus. The digital data processing for serial-to-parallel con-
version and clock recovery can be accomplished with the
HI-6010, HI-8683 or similar devices.
The HI-8482 is available in a variety of ceramic & plastic
packages including Small Outline (SOIC), J-Lead PLCC,
Cerquad, DIP & Leadless Chip Carrier (LCC).
FEATURES
! Converts ARINC 429 levels to digital data
! Direct replacement for the RM3183
! Greater than 2 volt receiving hysteresis
! TTL and CMOS outputs and test inputs
! Military screening available
! 20-Pin SOIC, PLCC, CERQUAD. DIP &
LCC packages are available
PIN CONFIGURATIONS (Top Views)
IN2B - 4
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
HI-8482J
HI-8482JT
20 - PIN
PLASTIC
J-LEAD PLCC
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
-VS - 1
TESTA - 2
CAP2B - 3
IN2B - 4
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
+VL - 9
N/C - 10
HI-8482PSI
HI-8482PST
20 - PIN
PLASTIC
SMALL
OUTLINE
(SOIC) - WB
20 - TESTB
19 - CAP1A
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
13 - N/C
12 - OUT1B
11 - +VS
ARINC INPUTS
V (A) - V (B)
Null
Zero
One
Don't Care
Don't Care
Don't Care
TRUTH TABLE
TEST INPUTS
TEST A TEST B
0
0
0
0
0
0
0
1
1
0
1
1
OUTPUTS
OUT A OUT B
0
0
0
1
1
0
0
1
1
0
0
0
(DS8482 Rev. C)
HOLT INTEGRATED CIRCUITS
1
02/01