HT56RB688_13 Datasheet, PDF (98/164 Pages) Holtek Semiconductor Inc – TinyPowerTM A/D Type Smart Card OTP MCU with LCD, DAC, ISO 7816 and USB Interfaces

HT56RB688
TinyPower^TM A/D type Smart Card OTP MCU
with LCD, DAC, ISO 7816 and USB Interfaces
Note that the RTC interrupt period is controlled by both configuration options and an internal register
RTCC. A configuration option selects the source clock for the internal clock f_S, and the RTCC register
bits RT2, RT1 and RT0 select the division ratio. Note that the actual division ratio can be programmed
from 2⁸ to 2¹⁵.
RTCC Register
Bit
7
Name
¾
R/W
¾
POR
¾
6
5
4
3
¾
LVDO
QOSC
LVDC
¾
R
R/W
R/W
¾
0
0
0
Bit 7~6
Bit 5
Bit 4
Bit 3
Bit 2~0
unimplemented, read as ²0²
LVDO: Low Voltage Detector Output
0: normal voltage
1: low voltage detected
QOSC: RTC Oscillator Quick-start enable control
0: enable
1: disable
LVDC: Low Voltage Detector enable control
0: disable
1: enable
RT2~RT0: RTC Interrupt Period selection
000: 2⁸/f_S
001: 2⁹/fS
010: 2¹⁰/f_S
011: 2¹¹/fS
100: 2¹²/f_S
101: 2¹³/f_S
110: 2¹⁴/fS
111: 2¹⁵/f_S
2
RT2
R/W
1
1
RT1
R/W
1
0
RT0
R/W
1
Time Base Interrupt
The Time Base Interrupt is contained within the Multi-function 0 Interrupt.
For a Time Base Interrupt to be generated, the global interrupt enable bit, EMI, Time Base Interrupt
enable bit, ETBI, and Multi-function 0 interrupt enable bit, EMF0I, must first be set. An actual Time
Base Interrupt will take place when the Time Base Interrupt request flag, TBF, is set, a situation that
will occur when the Time Base overflows. When the interrupt is enabled, the stack is not full and the
Time Base overflows, a subroutine call to the Multi-function 0 interrupt vector at location 24H, will
take place. When the Time Base Interrupt is serviced, the EMI bit will be cleared to disable other
interrupts, however only the MF0F interrupt request flag will be reset. As the TBF flag will not be
automatically reset, it has to be cleared by the application program.
The purpose of the Time Base function is to provide an interrupt signal at fixed time periods. The Time
Base interrupt clock source originates from the Time Base interrupt clock source originates from the
internal clock source fS. This fS input clock first passes through a divider, the division ratio of which is
selected by configuration options to provide longer Time Base interrupt periods. The Time Base
interrupt time-out period ranges from 2¹²/f_S~2¹⁵/f_S. The clock source that generates f_S, which in turn
controls the Time Base interrupt period, can originate from three different sources, the 32.768kHz
oscillator (LXT), the internal 32kHz RC oscillator (LIRC) or the System oscillator divided by 4
(f_SYS/4), the choice of which is determine by the f_S clock source configuration option.
Rev. 1.10
98
April 15, 2013