HT83F22 Datasheet, PDF (88/158 Pages) Holtek Semiconductor Inc – A/D Type Recorder 8-Bit Flash MCU

HT83F22
A/D Type Recorder 8-Bit Flash MCU
When the Timer/Event Counter overflows, its corresponding interrupt request flag in the interrupt
control register will be set. If the Timer/Event Counter interrupt is enabled this will in turn generate
an interrupt signal. However irrespective of whether the interrupts are enabled or not, a Timer/Event
Counter overflow will also generate a wake-up signal if the device is in a Power-down condition.
This situation may occur if the Timer/Event Counter is in the Event Counting Mode and if the
external signal continues to change state. In such a case, the Timer/Event Counter will continue to
count these external events and if an overflow occurs the device will be woken up from its Power-
down condition. To prevent such a wake-up from occurring, the timer interrupt request flag should
first be set high before issuing the “HALT” instruction to enter the Idle/Sleep Mode.
Timer/Event Counter Program Example
The program shows how the Timer/Event Counter registers are setup along with how the interrupts
are enabled and managed. Note how the Timer/Event Counter is turned on, by setting bit 4 of the
Timer Control Register. The Timer/Event Counter can be turned off in a similar way by clearing the
same bit. This example program sets the Timer/Event Counters to be in the timer mode, which uses
the internal system clock as their clock source.
Timer/Event Counter Program Example
org
04h
; external interrupt vector
org
30h
; Timer/Event Counter interrupt vector
jmp
tmrint
; jump here when TMR overflows
:
:
org
20h
; main program
:
:
;internal TMR interrupt routine
tmrint:
:
; TMR main program placed here
:
:
begin:
;setup TMR registers
mov
a,09bh
; setup TMR preload value
mov
tmr,a
mov
a,080h
; setup TMR control register
mov
tmrc,a
; timer mode and prescaler set to /2
;setup interrupt register
mov
a,00dh
; enable master interrupt and both timer interrupts
mov
intc0,a
:
:
set
tmrc.4
; start TMR
:
Rev. 1.00
88
April 01, 2011