BC68F2420BC68F2420 Datasheet, PDF (85/116 Pages) Holtek Semiconductor Inc – 315/433MHz RF Super-regenerative Receiver SoC Flash MCU

BC68F2420
315/433MHz RF Super-regenerative
Receiver SoC Flash MCU
RF Receiver
The device contains a fully integrated RF receiver, which is capable of using On-Off Keying
(OOK) demodulation for data streaming. It is in effect a genuine RF antenna-in to digital data-out
fully integrated device. As all the RF and IF circuitry are integrated within the device this results
in a huge reduction in the required number of external components. Having such a high degree of
functional integration greatly reduces both product and manufacturing costs and provides higher
reliability. The simple connection of an antenna, and some tuned LC circuits together with several
software configurations allows the device to detect RF at its resonant frequency. Then by using an
internal low noise amplifier and super-regenerative techniques, the demodulator can generate data
on the digital data output pin. An antenna matching circuit is supplied on the RFIN pin and an LC
tank circuit is connected to the L1 and L2 pins to generate the local oscillator frequency. A fully
internal high frequency oscillator in the device is used to demodulate the data from the intermediate
frequency signal, thus eliminating the need for any further filtering components. The addition of a
decoupling capacitor on each of the power pins is then all that is required to complete the circuit.
VSSRF
VDDRF
RFIN
fHIRC
Digital
Demodulator
0
1
DISEL
01
DOSEL
Debounce
Circuit
RFDATA
&
RF Edge Interrupt
STM Capture Input
Quench
LNA
Signal
Generator
Pin-shared
Control
PXSR
L1 L2
PB1
RF Receiver Block Diagram
RFDO
RF Receiver Control Registers
The RF receiver is controlled by several registers. These registers control the overall RF function,
such as RF power down control, quench frequency selection, RF data out source selection, and de-
bounce stage selection, etc.
Register
Name
7
RFC0
—
6
LTMV_fast_sel
5
DOSR1
Bit
4
DOSR0
3
2
DEMOD_RST
S1
1
0
S0
PDRF
RFC1*
D7
D6
D5
D4
D3
D2
D1
D0
RFC2*
D7
D6
D5
D4
D3
D2
D1
D0
RFC3*
D7
D6
D5
D4
D3
D2
D1
D0
RFC4*
D7
D6
D5
D4
D3
D2
D1
D0
RFC5*
D7
D6
D5
D4
D3
D2
D1
D0
RFC6 PUL_RST_SEL1 PUL_RST_SEL0 EXT_PUL_RST RST_THD_SEL1 RST_THD_SEL0 DISEL DOSEL CKOFF
RFC7*
D7
D6
D5
D4
D3
D2
D1
D0
RFDEBC RFDATA
—
—
—
—
DSTAG2 DSTAG1 DSTAG0
Note: These registers are used for RF performance optimization. Refer to the corresponding application note for details.
RF Receiver Control Registers List
Rev. 1.00
85
May 24, 2017