BS85B12-3 Datasheet, PDF (84/182 Pages) Holtek Semiconductor Inc – Touch Key Flash Type 8-Bit MCU with LCD/LED Driver

BS85B12-3/BS85C20-3
Touch Key Flash MCU with LCD/LED Driver
As the name of the mode suggests, after a comparison is made, the TM output pin, will change state.
The TM output pin condition however only changes state when a TnAF interrupt request flag is
generated after a compare match occurs from Comparator A. The TnPF interrupt request flag,
generated from a compare match occurs from Comparator P, will have no effect on the TM output pin.
The way in which the TM output pin changes state are determined by the condition of the TnIO1 and
TnIO0 bits in the TMnC1 register. The TM output pin can be selected using the TnIO1 and TnIO0 bits
to go high, to go low or to toggle from its present condition when a compare match occurs from
Comparator A. The initial condition of the TM output pin, which is setup after the TnON bit changes
from low to high, is setup using the TnOC bit. Note that if the TnIO1 and TnIO0 bits are zero then no
pin change will take place.
Timer/Counter Mode
To select this mode, bits TnM1 and TnM0 in the TMnC1 register should be set to 11 respectively. The
Timer/Counter Mode operates in an identical way to the Compare Match Output Mode generating the
same interrupt flags. The exception is that in the Timer/Counter Mode the TM output pin is not used.
Therefore the above description and Timing Diagrams for the Compare Match Output Mode can be
used to understand its function. As the TM output pin is not used in this mode, the pin can be used as a
normal I/O pin or other pin-shared function.
Counter Value
0x3FF
CCRA
CCRP
TnCCLR = 1; TnM [1:0] = 00
CCRA > 0 Counter cleared by CCRA value
CCRA = 0
Counter overflow
Resume
CCRA=0
Pause
Stop Counter Restart
TnON
Time
TnPAU
TnPOL
CCRA Int.
Flag TnAF
CCRP Int.
Flag TnPF
No TnAF flag
generated on
CCRA overflow
TM O/P Pin
TnPF not
generated
Output pin set to
initial Level Low
if TnOC=0
Output Toggle with
TnAF flag
Here TnIO [1:0] = 11
Toggle Output select
Output does
not change
Output not affected by
TnAF flag. Remains High
until reset by TnON bit
Output Pin
Output Inverts
when TnPOL is high
Note TnIO [1:0] = 10
Active High Output select
Reset to Initial value
Output controlled by
other pin-shared function
Compare Match Output Mode -- TnCCLR = 1
Note:
1. With TnCCLR=1 a Comparator A match will clear the counter
2. The TM output pin is controlled only by the TnAF flag
3. The output pin is reset to its initial state by a TnON bit rising edge
4. A TnPF flag is not generated when TnCCLR=1
Rev. 1.00
78
February 1, 2011