HT66F302 Datasheet, PDF (79/129 Pages) Holtek Semiconductor Inc – Cost-Effective Flash MCU with EEPROM

HT66F302/HT66F303
Cost-Effective Flash MCU with EEPROM
Register
Name
PTMC0
PTMC1
PTMDL
PTMDH
PTMAL
PTMAH
PTMRPL
PTMRPH
7
PTPAU
PTM1
D7
—
D7
—
D7
—
6
PTCK2
PTM0
D6
—
D6
—
D6
—
5
PTCK1
PTIO1
D5
—
D5
—
D5
—
Bit
4
3
PTCK0 PTON
PTIO0 PTOC
D4
D3
—
—
D4
D3
—
—
D4
D3
—
—
2
—
PTPOL
D2
—
D2
—
D2
—
10-bit Periodic TM Register List
1
—
PTCKS
D1
D9
D1
D9
D1
D9
0
—
PTCCLR
D0
D8
D0
D8
D0
D8
PTMC0 Register
Bit
7
6
5
4
3
2
1
0
Name PTPAU PTCK2 PTCK1 PTCK0 PTON
—
—
—
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
POR
0
0
0
0
0
—
—
—
Bit 7
Bit 6~4
Bit 3
Bit 2~0
PTPAU: PTM Counter Pause Control
0: run
1: pause
The counter can be paused by setting this bit high. Clearing the bit to zero restores
normal counter operation. When in a Pause condition the TM will remain powered up
and continue to consume power. The counter will retain its residual value when this bit
changes from low to high and resume counting from this value when the bit changes
to a low value again.
PTCK2~PTCK0: Select PTM Counter clock
000: fSYS/4
001: fSYS
010: fH/16
011: fH/64
100: fTBC
101: fTBC
110: PTCK rising edge clock
111: PTCK falling edge clock
These three bits are used to select the clock source for the TM. The external pin clock
source can be chosen to be active on the rising or falling edge. The clock source fSYS is
the system clock, while fTBC is another internal clock, the details of which can be found
in the oscillator section.
PTON: PTM Counter On/Off Control
0: Off
1: On
This bit controls the overall on/off function of the TM. Setting the bit high enables the
counter to run, clearing the bit disables the TM. Clearing this bit to zero will stop the
counter from counting and turn off the TM which will reduce its power consumption.
When the bit changes state from low to high the internal counter value will be reset to
zero, however when the bit changes from high to low, the internal counter will retain
its residual value until the bit returns high again.
If the TM is in the Compare Match Output Mode then the TM output pin will be reset
to its initial condition, as specified by the TM Output control bit, when the bit changes
from low to high.
Unimplemented, read as “0”
Rev. 1.11
79
April 11, 2017