HT45R35 Datasheet, PDF (7/54 Pages) Holtek Semiconductor Inc – C/R to F Type 8-Bit OTP MCU

HT45R35
Program Memory
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
2048´14 bits, addressed by the program counter and ta-
ble pointer.
Certain locations in the program memory are reserved
for special usage:
· Location 000H
This area is reserved for program initialisation. After a
device reset, the program always begins execution at
location 000H.
· Location 004H
This location is reserved for the external interrupt 0
service program. If the INT0 input pin is activated, the
interrupt is enabled and the stack is not full, the pro-
gram begins execution at this location.
· Location 008H
This location is reserved for the external interrupt 1
service program. If the INT1 input pin is activated, the
interrupt is enabled and the stack is not full, the pro-
gram begins execution at this location.
· Location 00CH
This location is reserved for the Timer/Event Counter
interrupt service program. If a Timer interrupt results
from a Timer/Event Counter overflow, and the inter-
rupt is enabled and the stack is not full, the program
begins execution at this location.
000H
D e v ic e In itia liz a tio n P r o g r a m
004H
E x te rn a l In te rru p t 0
008H
E x te rn a l In te rru p t 1
00C H
T im e r /E v e n t C o u n te r O v e r flo w
010H
E x te r n a l R C O s c illa tio n
C o n v e rte r In te rru p t
P ro g ra m
M e m o ry
n00H
nFFH
L o o k - u p T a b le ( 2 5 6 w o r d s )
700H
7FFH
L o o k - u p T a b le ( 2 5 6 w o r d s )
1 4 - B its
N o te : n ra n g e s fro m 0 to 7
Program Memory
· Location 010H
This location is reserved for the external RC oscilla-
tion converter interrupt service program. If an interrupt
results from an external RC oscillation converter, and
if the interrupt is enabled and the stack is not full, the
program begins execution at this location.
· Table location
Any location in the program memory can be used as a
look-up table. The instructions ²TABRDC [m]² (the
current page, 1 page=256 words) and ²TABRDL [m]²
transfer the contents of the lower-order byte to the
specified data memory, and the higher-order byte to
TBLH. Only the destination of the lower-order byte in
the table is well-defined, the other bits of the table
word are transferred to the lower portion of TBLH, and
the remaining 2 bits are read as ²0². The Table
Higher-order byte register, TBLH, is read only. The ta-
ble pointer, TBLP, is a read/write register, which indi-
cates the table location. Before accessing the table,
the location must be placed in TBLP. The TBLH regis-
ter is read only and cannot be restored. If the main
routine and the ISR (Interrupt Service Routine) both
employ the table read instruction, the contents of the
TBLH in the main routine are likely to be changed by
the table read instruction used in the ISR and errors
may occur. Therefore, using the table read instruction
in the main routine and also in the ISR should be
avoided. However, if the table read instruction has to
be used in both the main routine and in the ISR, the in-
terrupt should be disabled prior to the table read in-
struction execution. The interrupt should not be
re-enabled until TBLH has been backed up. All table
related instructions require two cycles to complete the
operation. These areas may function as normal pro-
gram memory depending upon the requirements.
Stack Register - STACK
This is a special part of the memory which is used to save
the contents of the program counter only. The stack is
organised into 4-levels and is neither part of the data nor
part of the program space, and is neither readable nor
writable. The activated level is indexed by the stack
pointer, SP and is neither readable nor writeable. At a
subroutine call or interrupt acknowledgment, the con-
tents of the program counter are pushed onto the stack.
At the end of a subroutine or an interrupt routine, signaled
Table Location
Instruction
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m] P10 P9
P8 @7 @6 @5 @4 @3 @2 @1 @0
TABRDL [m]
1
1
1
@7 @6 @5 @4 @3 @2 @1 @0
Table Location
Note: *10~*0: Table location bits
@7~@0: Table pointer bits
P10~P8: Current program counter bits
Rev. 1.20
7
January 29, 2010