HT82B42R Datasheet, PDF (61/86 Pages) Holtek Semiconductor Inc – I/O MCU with USB Interface

HT82B42R/HT82B42RE
I/O MCU with USB Interface
SPI Communication
After the SPI interface is enabled by setting the SPI_EN bit high, then in the Master Mode, when
data is written to the SBDR register, transmission/reception will begin simultaneously. When the
data transfer is complete, the TRF flag will be set automatically, but must be cleared using the
application program. In the Slave Mode, when the clock signal from the master has been received,
any data in the SBDR register will be transmitted and any data on the SDI pin will be shifted into
the SBDR register. The master should output an SCS signal to enable the slave device before a
clock signal is provided. The slave data to be transferred should be well prepared at the appropriate
moment relative to the SCS signal depending upon the options of the SPI_MODE bit and SPI_CPOL
bit. The accompanying timing diagram shows the relationship between the slave data and SCS signal
for various configurations of the SPI_MODE and SPI_CPOL bits.
The SPI will continue to function even in the IDLE Mode.
Rev. 1.00
61
October 27, 2011