HT66FB540 Datasheet, PDF (56/245 Pages) Holtek Semiconductor Inc – A/D Flash USB 8-Bit MCU with SPI

HT66FB540/HT66FB550/HT66FB560
A/D Flash USB 8-Bit MCU with SPI
Internal PLL Frequency Generator
The internal PLL frequency generator is used to generate the frequency for the USB interface and
the system clock. This PLL generator can be enabled or disabled by the PLL control bit in the USC
register. After a power on reset, the PLL control bit will be set to “0” to turn on the PLL generator.
The PLL generator will provide the fixed 48MHz frequency for the USB operating frequency and
another frequency for the system clock source which can be either 6MHz, 12MHz or 16MHz. The
selection of this system frequency is implemented using the SYSCLK, Fsys16MHZ and USBCKEN
bits in the UCC register. In addition, the system clock can be selected as the HXT via these control
bits. The CLK_ADJ bit is used to adjust the PLL clock automatically.
SYSC Register
Bit
7
6
5
4
Name CLK_ADJ USBdis RUBUS
—
R/W
R/W
R/W
R/W
—
POR
0
0
0
—
3
2
1
0
—
HFV
—
—
—
R/W
—
—
—
0
—
—
Bit 7
Bit 6
Bit 5
Bit 4~3
Bit 2
Bit 1~0
CLK_ADJ: PLL Clock Automatic Adjustment function
0: Disable
1: Enable
Note that if the user selects the HIRC as the system clock, the CLK_ADJ bit must be
set to “1” to adjust the PLL frequency automatically.
USBdis: USB SIE control bit
USB related control bit, described elsewhere
RUBUS: UBUS pin pull low resistor
USB related control bit, described elsewhere
"—": unimplemented, read as "0"
HFV: Non-USB mode high frequency voltage control
0: For USB mode - bit must be cleared to zero.
1: For non-USB mode - bit must be set high. Ensures that the higher frequency
can work at lower voltages.
A higher frequency is >8MHz and is used for the system clock fH.
"—": unimplemented, read as "0"
Rev. 1.00
56
April 03, 2013