HT16D35A Datasheet, PDF (56/71 Pages) Holtek Semiconductor Inc – RAM Mapping 28×8 Constant Current LED Driver

HT16D35A/HT16D35B
Write Operation
• Single Command Byte
A byte write operation requires a START condition, a slave address with a R/W bit, a command (1st) and a
STOP condition for a single command byte.
Slave Address
Command byte
S 1 1 0 1 0 0 A0 0
BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
P
Write ACK
1st
ACK
Single Command Byte
• Compound Command Byte
A byte write operation requires a START condition, a slave address with a R/W bit, a command (1st), one or
more register byte commands (2nd~nth) and a STOP condition for a compound command byte.
Slave Address
S 1 1 0 1 0 0 A0 0
Command byte
BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
Register byte
BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
Register byte
BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
P
Write ACK
1 st
ACK
2nd
ACK ACK
nth
ACK
Compound Command Byte
• Single Write RAM Data Byte Operation
If the input memory location value is greater than the limit value, the input memory location value will be
invalid.
Following a START condition, the slave address and R/W bit is placed on the bus. Then follows the display
data address setup command code (1st). The address pointer (An) is then written to the address pointer (2nd)
and then valid data and a STOP condition for a compound write single data byte.
Slave Address
Command byte
Address byte
DATA byte
S 1 1 0 1 0 0 A0 0
BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
A7 A6 A5 A4 A3 A2 A1 A0
D0 D1 D2 D3 D0 D1 D2 D3
P
Write ACK
1st
ACK
2nd
ACK
3rd
ACK
Note: If the input memory location value is greater than the limit value, the input memory location value will be
invalid.
• Page Write RAM Data Operation
Following a START condition the slave address along with the R/W bit is placed on the bus along with the
display data address setup command code (1st) and the address pointer, An, (2nd). The data to be written to
the memory is next, after which the internal address pointer is incremented to the next address location on the
reception of an acknowledge clock.
Slave Address
S 1 1 0 1 0 0 A0 0
Command byte
BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
Address byte
A7 A6 A5 A4 A3 A2 A1 A0
Write
ACK
ACK
ACK
Data byte
D7 D6 D5 D4 D3 D2 D1 D0
Data byte
D7 D6 D5 D4 D3 D2 D1 D0
Data byte
D7 D6 D5 D4 D3 D2 D1 D0
P
1st byte data
ACK
2nd byte data
ACK
ACK
nth byte data
ACK
Rev. 1.00
56
January 12, 2017