BS85B12-3_12 Datasheet, PDF (53/183 Pages) Holtek Semiconductor Inc – Touch Key Flash Type 8-Bit MCU with LCD/LED Driver

BS85B12-3/BS85C20-3/BS85C20-5
Touch Key Flash MCU with LCD/LED Driver
Watchdog Timer Operation
In these devices the Watchdog Timer supplied by the fLIRC oscillator and is therefore always on. The
Watchdog Timer operates by providing a device reset when its timer overflows. This means that in
the application program and during normal operation the user has to strategically clear the Watchdog
Timer before it overflows to prevent the Watchdog Timer from executing a reset. This is done using
the clear watchdog instructions.Iftheprogrammalfunctionsforwhatever reason, jumps to
an unkown location, or enters an endless loop, these clear instructions will not be executed in the
correct manner, in which case the Watchdog Timer will overflow and reset the device.
Under normal program operation, a Watchdog Timer time-out will initialise a device reset and set
the status bit TO. However, if the system is in the SLEEP or IDLE Mode, when a Watchdog Timer
time-out occurs, the TO bit in the status register will be set and only the Program Counter and Stack
Pointer will be reset. Three methods can be adopted to clear the contents of the Watchdog Timer.
The first is an external hardware reset, the second is using the Watchdog Timer software clear
instructions and the third is via a HALT instruction. The Watchdog Timer is cleared using a single
CLR WDT instruction.
The maximum time out period is when the 2¹⁵ division ratio is selected. As an example, with the
LIRC oscillator as its source clock, this will give a maximum watchdog period of around 1 second
for the 2¹⁵ division ratio, and a minimum timeout of 7.8ms for the 2⁸ division ration.
C le a r W D T
In s tr u c tio n
L IR C O s c illa to r
fL IR C /2 ⁸
8 - s ta g e D iv id e r
C LR
W D T P r e s c a le r
8 -to -1 M U X
W S 2~W S 0
Watchdog Timer
W D T T im e - o u t
( 2 ⁸ /fL IR C ~ 2 ^{1 5} /fL IR C )
Rev. 1.20
53
August 10, 2012