HT48R064G_12 Datasheet, PDF (51/128 Pages) Holtek Semiconductor Inc – Enhanced I/O Type MCU with OPA

HT48R064G/065G/066G/0662G
Enhanced I/O Type 8-Bit OTP MCU with OPA
Input/Output Ports
Holtek microcontrollers offer considerable flexibility on their I/O ports. Most pins can have either an
input or output designation under user program control. Additionally, as there are pull-high resistors
and wake-up software configurations, the user is provided with an I/O structure to meet the needs of a
wide range of application possibilities.
For input operation, these ports are non-latching, which means the inputs must be ready at the T2 rising
edge of instruction ²MOV A,[m]², where m denotes the port address. For output operation, all the data
is latched and remains unchanged until the output latch is rewritten.
Pull-high Resistors
Many product applications require pull-high resistors for their switch inputs usually requiring the use
of an external resistor. To eliminate the need for these external resistors, when configured as an input
have the capability of being connected to an internal pull-high resistor. These pull-high resistors are
selectable via a register known as PAPU, PBPU, PCPU, PDPU, PEPU and PFPU located in the Data
Memory. The pull-high resistors are implemented using weak PMOS transistors. Note that pin PA7
does not have a pull-high resistor selection.
I/O Port Wake-up
If the HALT instruction is executed, the device will enter the Idle/Sleep Mode, where the system clock
will stop resulting in power being conserved, a feature that is important for battery and other
low-power applications. Various methods exist to wake-up the microcontroller, one of which is to
change the logic condition on one of the PA0~PA7 pins from high to low. For the HT48R0662G
device, a logic transition from high to low on one of the PC0~PC7 pins can also wake up the
microcontroller if the corresponding wake-up function control is enabled. After a HALT instruction
forces the microcontroller into entering the Idle/Sleep Mode, the processor will remain idle or in a
low-power state until the logic condition of the selected wake-up pin on Port A or Port C changes from
high to low. This function is especially suitable for applications that can be woken up via external
switches. Note that pins PA0~PA7 or PC0~PC7 can be selected individually to have this wake-up
feature using an internal register known as PAWK or PCWK, located in the Data Memory.
PAWK, PAC~PCC, PAPU~PCPU Registers - HT48R064G
Register
Name
PAWK
PAC
PAPU
PBC
PBPU
PCC
PCPU
POR
00H
FFH
00H
0FH
00H
F3H
00H
7
PAWK7
PAC7
¾
¾
¾
PCC7
PCPU7
6
PAWK6
PAC6
PAPU6
¾
¾
PCC6
PCPU6
5
PAWK5
PAC5
PAPU5
¾
¾
PCC5
PCPU5
Bit
4
3
PAWK4 PAWK3
PAC4 PAC3
PAPU4 PAPU3
¾
PBC3
¾
PBPU3
PCC4
¾
PCPU4
¾
²¾² Unimplemented, read as ²0²
PAWKn: PA wake-up function enable
0: disable
1: enable
PACn/PBCn/PCCn: I/O type selection
0: output
1: input
PAPUn/PBPUn/PCPUn: Pull-high function enable
0: disable
1: enable
2
PAWK2
PAC2
PAPU2
PBC2
PBPU2
¾
¾
1
PAWK1
PAC1
PAPU1
PBC1
PBPU1
PCC1
PCPU1
0
PAWK0
PAC0
PAPU0
PBC0
PBPU0
PCC0
PCPU0
Rev. 1.10
51
October 23, 2012