HT45FH4J Datasheet, PDF (49/129 Pages) Holtek Semiconductor Inc – Emergency Light Flash MCU

HT45FH4J
Emergency Light Flash MCU
• CTRL Register
Bit
7
6
5
4
3
2
1
0
Name FSYSON —
—
—
—
LVRF
LRF
WRF
R/W
R/W
—
—
—
—
R/W
R/W
R/W
POR
0
—
—
—
—
x
0
0
Bit 7
FSYSON: fSYS Control IDLE Mode
Describe elsewhere
"x" unknown
Bit 6~ 3 Unimplemented, read as “0”
Bit 2
LVRF: LVR function reset flag
0: Not occur
1: Occurred
This bit is set high when a specific Low Voltage Reset situation condition occurs. This
bit can only be cleared to zero by the application program.
Bit 1
LRF: LVR Control register software reset flag
0: Not occur
1: Occurred
This bit is set high if the LVRC register contains any non defined LVR voltage register
values. This in effect acts like a software reset function. This bit can only be cleared to
zero by the application program.
Bit 0
WRF: WDT Control register software reset flag
Describe elsewhere
Watchdog Time-out Reset during Normal Operation
The Watchdog time-out Reset during normal operation is the same as a LVR reset except that the
Watchdog time-out flag TO will be set high.
W D T T im e - o u t
tR S T D + tS S T
In te rn a l R e s e t
Note: tRSTD is power-on delay, typical time=16.7ms
WDT Time-out Reset during Normal Operation Timing Chart
Watchdog Time-out Reset during SLEEP or IDLE Mode
The Watchdog time-out Reset during SLEEP or IDLE Mode is a little different from other kinds
of reset. Most of the conditions remain unchanged except that the Program Counter and the Stack
Pointer will be cleared to zero and the TO flag will be set high. Refer to the A.C. Characteristics for
tSST details.
W D T T im e - o u t
tS S T
In te rn a l R e s e t
WDT Time-out Reset during SLEEP or IDLE Timing Chart
Rev. 1.10
49
December 14, 2016