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HT46R0664 Datasheet, PDF (41/92 Pages) Holtek Semiconductor Inc – Enhanced A/D+LCD Type 8-Bit OTP MCU
HT46R0664
Enhanced A/D+LCD 8-Bit OTP MCU
Input/Output Ports
Holtek microcontrollers offer considerable flexibility on their I/O ports. Most pins can have either an
input or output designation under user program control. Additionally, as there are pull-high resistors
and wake-up software configurations, the user is provided with an I/O structure to meet the needs
of a wide range of application possibilities. For input operation, these ports are non-latching, which
means the inputs must be ready at the T2 rising edge of instruction “MOV A, [m]”, where m denotes
the port address. For output operation, all the data is latched and remains unchanged until the output
latch is rewritten.
Pull-high Resistors
Many product applications require pull-high resistors for their switch inputs usually requiring the
use of an external resistor. To eliminate the need for these external resistors, all I/O pins, when
configured as an input have the capability of being connected to an internal pull-high resistor. These
pull-high resistors are selected using registers PAPU, PBPU, etc. and are implemented using weak
PMOS transistors.
Port A Wake-up
The HALT instruction forces the microcontroller into the SLEEP or IDLE Mode which preserves
power, a feature that is important for battery and other low-power applications. Various methods
exist to wake-up the microcontroller, one of which is to change the logic condition on one of the
Port A pins from high to low. After a HALT instruction forces the microcontroller into entering the
Idle/Sleep Mode, the processor will remain idle or in a low-power state until the logic condition of
the selected wake-up pin on Port A changes from high to low. This function is especially suitable for
applications that can be woken up via external switches. Note that pins PA0 to PA7 can be selected
individually to have this wake-up feature using an internal register known as PAWK, located in the
Data Memory.
Register
Name
PAWK
PAPU
PAC
PBPU
PBC
PCPU
PCC
PDPU
PDC
PEPU
PEC
PFPU
PFC
7
PAWK7
—
PAC7
PBPU7
PBC7
PCPU7
PCC7
PDPU7
PDC7
—
—
—
—
6
PAWK6
PAPU6
PAC6
PBPU6
PBC6
PCPU6
PCC6
PDPU6
PDC6
PEPU6
PEC6
—
—
5
PAWK5
PAPU5
PAC5
PBPU5
PBC5
PCPU5
PCC5
PDPU5
PDC5
PEPU5
PEC5
—
—
Bit
4
3
PAWK4 PAWK3
PAPU4 PAPU3
PAC4 PAC3
PBPU4 PBPU3
PBC4 PBC3
PCPU4 PCPU3
PCC4 PCC3
PDPU4 PDPU3
PDC4 PDC3
PEPU4 PEPU3
PEC4
—
PEC3
—
—
—
2
PAWK2
PAPU2
PAC2
PBPU2
PBC2
PCPU2
PCC2
PDPU2
PDC2
PEPU2
PEC2
PFPU2
PFC2
1
PAWK1
PAPU1
PAC1
PBPU1
PBC1
PCPU1
PCC1
PDPU1
PDC1
PEPU1
PEC1
PFPU1
PFC1
0
PAWK0
PAPU0
PAC0
PBPU0
PBC0
PCPU0
PCC0
PDPU0
PDC0
PEPU0
PEC0
PFPU0
PFC0
“—”
Unimplemented, read as “0”
PAWKn: PA wake-up function control
0: disable
1: enable
PACn/PBCn/PCCn/PDCn/PECn/PFCn: I/O type selection
0: output
1: input
PAPUn/PBPUn/PCPUn/PDPUn/PEPUn/PFPUn: Pull-high function control
0: disable
1: enable
Rev. 1.00
41
August 12, 2011