HT46RU232 Datasheet, PDF (34/60 Pages) Holtek Semiconductor Inc – A/D Type 8-Bit OTP MCU with UART

HT46RU232
Baud
Rate
K/BPS
f_SYS=8MHz
BRG Kbaud Error
Baud Rates for BRGH=1
f_SYS=7.159MHz
f_SYS=4MHz
BRG Kbaud Error BRG Kbaud Error
0.3
¾
¾
¾
¾
¾
¾
¾
¾
¾
1.2
¾
¾
¾
¾
¾
¾
207 1.202 0.16
2.4 207 2.404 0.16 185 2.405 0.23 103 2.404 0.16
4.8 103 4.808 0.16 92 4.811 0.23 51 4.808 0.16
9.6
51 9.615 0.16 46 9.520 -0.832 25 9.615 0.16
19.2 25 19.231 0.16 22 19.454 1.32 12 19.231 0.16
38.4 12 38.462 0.16 11 37.287 -2.9
6 35.714 -6.99
57.6
8 55.556 -3.55 7 55.93 -2.9
3
62.5 8.51
115.2 3
125 8.51
3 111.86 -2.9
1
125 8.51
250
1
250
0
¾
¾
¾
0
250
0
Baud Rates and Error Values for BRGH = 1
f_SYS=3.579545MHz
BRG Kbaud Error
¾
¾
¾
185 1.203 0.23
92 2.406 0.23
46 4.76 -0.83
22 9.727 1.32
11 18.643 -2.9
5 37.286 -2.9
3 55.930 -2.9
1 111.86 -2.9
¾
¾
¾
· Setting up and controlling the UART
¨ Introduction
For data transfer, the UART function utilizes a
non-return-to-zero, more commonly known as
NRZ, format. This is composed of one start bit, eight
or nine data bits, and one or two stop bits. Parity is
supported by the UART hardware, and can be
setup to be even, odd or no parity. For the most
common data format, 8 data bits along with no par-
ity and one stop bit, denoted as 8, N, 1, is used as
the default setting, which is the setting at power-on.
The number of data bits and stop bits, along with the
parity, are setup by programming the corresponding
BNO, PRT, PREN, and STOPS bits in the UCR1
register. The baud rate used to transmit and receive
data is setup using the internal 8-bit baud rate gen-
erator, while the data is transmitted and received
LSB first. Although the UART¢s transmitter and re-
ceiver are functionally independent, they both use
the same data format and baud rate. In all cases
stop bits will be used for data transmission.
¨ _{Enabling/disabling the UART}
The basic on/off function of the internal UART func-
tion is controlled using the UARTEN bit in the UCR1
register. As the UART transmit and receive pins, TX
and RX respectively, are pin-shared with normal I/O
pins, one of the basic functions of the UARTEN con-
trol bit is to control the UART function of these two
pins. If the UARTEN, TXEN and RXEN bits are set,
then these two I/O pins will be setup as a TX output
pin and an RX input pin respectively, in effect dis-
abling the normal I/O pin function. If no data is being
transmitted on the TX pin then it will default to a
logic high value.
Clearing the UARTEN bit will disable the TX and RX
pins and allow these two pins to be used as normal
I/O pins. When the UART function is disabled the
buffer will be reset to an empty condition, at the
same time discarding any remaining residual data.
Disabling the UART will also reset the error and sta-
tus flags with bits TXEN, RXEN, TXBRK, RXIF,
OERR, FERR, PERR and NF being cleared while
bits TIDLE, TXIF and RIDLE will be set. The re-
maining control bits in the UCR1, UCR2 and BRG
registers will remain unaffected. If the UARTEN bit
in the UCR1 register is cleared while the UART is
active, then all pending transmissions and recep-
tions will be immediately suspended and the UART
will be reset to a condition as defined above. If the
UART is then subsequently re-enabled, it will restart
again in the same configuration.
¨ _{Data, parity and stop bit selection}
The format of the data to be transferred, is com-
posed of various factors such as data bit length,
parity on/off, parity type, address bits and the num-
ber of stop bits. These factors are determined by
the setup of various bits within the UCR1 register.
The BNO bit controls the number of data bits which
can be set to either 8 or 9, the PRT bit controls the
choice of odd or even parity, the PREN bit controls
the parity on/off function and the STOPS bit decides
whether one or two stop bits are to be used. The fol-
lowing table shows various formats for data trans-
mission. The address bit identifies the frame as an
address character. The number of stop bits, which
can be either one or two, is independent of the data
length.
Rev. 1.00
34
April 23, 2008