HT45R37_11 Datasheet, PDF(31/100 Page) Holtek Semiconductor Inc

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HT45R37_11 Datasheet, PDF (31/100 Pages) Holtek Semiconductor Inc – TinyPowerTM C/R-F Type 8-Bit OTP MCU

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HT45R37

Pulse Width Modulator

The device contains twos Pulse Width Modulation,

PWM, outputs. Useful for such applications such as mo-

tor speed control, the PWM function provides an output

with a fixed frequency, but with a duty cycle that can be

varied by setting particular values into the correspond-

ing PWM register pair.

Channel

PWM

Mode

8+4

Output

PD0

PD1

Names

PWM0L~

PWM0H

PWM1L~

PWM1H

PWM Overview

A register pair, located in the Data Memory is assigned

to each Pulse Width Modulator output and are known as

the PWM registers. It is in each register pair that the

12-bit value, which represents the overall duty cycle of

one modulation cycle of the output waveform, should be

placed. The PWM registers also contain the enable/dis-

able control bit for the PWM outputs. To increase the

PWM modulation frequency, each modulation cycle is

modulated into sixteen individual modulation

sub-sections, known as the 8+4 mode. Note that it is

only necessary to write the required modulation value

into the corresponding PWM register as the subdivision

of the waveform into its sub-modulation cycles is imple-

mented automatically within the microcontroller hard-

ware. The PWM clock source is the system clock fSYS.

This method of dividing the original modulation cycle

into a further 16 sub-cycles enables the generation of

higher PWM frequencies, which allow a wider range of

applications to be served. As long as the periods of the

generated PWM pulses are less than the time constants

of the load, the PWM output will be suitable as such long

time constant loads will average out the pulses of the

PWM output. The difference between what is known as

the PWM cycle frequency and the PWM modulation fre-

quency should be understood. As the PWM clock is the

system clock, fSYS, and as the PWM value is 12-bits

wide, the overall PWM cycle frequency is fSYS/4096.

However, when in the 8+4 mode of operation, the PWM

modulation frequency will be fSYS/256.

PWM

Modulation

Frequency

PWM Cycle

Frequency

PWM Cycle

Duty

fSYS/256

fSYS/4096

(PWM register

value)/4096

8+4 PWM Mode Modulation

Each full PWM cycle, as it is 12-bits wide, has 4096 clock

periods. However, in the 8+4 PWM mode, each PWM cy-

cle is subdivided into sixteen individual sub-cycles known

as modulation cycle 0 ~ modulation cycle 15, denoted as

Â²iÂ² in the table. Each one of these sixteen sub-cycles con-

tains 256 clock cycles. In this mode, a modulation fre-

quency increase of sixteen is achieved. The 12-bit PWM

the PWM waveform, is divided into two groups. The first

group which consists of bit4~bit11 is denoted here as the

DC value. The second group which consists of bit0~bit3

is known as the AC value. In the 8+4 PWM mode, the

duty cycle value of each of the two modulation sub-cycles

is shown in the following table.

Parameter

Modulation cycle i

(i=0~15)

AC (0~15)

i<AC

iÂ³AC

DC (Duty Cycle)

DC+1

256

8+4 Mode Modulation Cycle Values

The accompanying diagram illustrates the waveforms

associated with the 8+4 mode of PWM operation. It is

important to note how the single PWM cycle is subdi-

vided into 16 individual modulation cycles, numbered

0~15 and how the AC value is related to the PWM value.

PWM Output Control

The two outputs, PWM0 and PWM1, are shared with

pins PD0 and PD1. To operate as a PWM output and not

as an I/O pin, bit 0 of the relevant PWM low byte register

bit must be set high. A zero must also be written to the

corresponding bit in the PDC port control register, to en-

sure that the PWM0 output pin is setup as an output. Af-

ter these two initial steps have been carried out, and of

course after the required PWM 12-bit value has been

written into the PWM register pair register, setting the

corresponding bit in the PD data register high will enable

the PWM data to appear on the pin. Writing a zero to the

bit will disable the PWM output function and force the

output low. In this way, the Port D data output register

bits, can also be used as an on/off control for the PWM

function. Note that if the enable bit in the PWM register

is set high to enable the PWM function, but if the corre-

sponding bit in the PDC control register is high to config-

ure the pin as an input, then the pin can still function as a

normal input line, with pull-high resistor selections.

Rev. 1.20

February 25, 2011

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