HT1635A Datasheet, PDF (3/29 Pages) Holtek Semiconductor Inc – 44×8 LED Driver

HT1635A/HT1635B
Pin Description
Pin Name
I/O
Function
COM0~COM7 O LED common output lines.
ROW0~ROW43 O LED row output lines.
VDD
—
Positive power supply.
In PCB Layout that must connect all of the VDD pins to the power plane.
VSS
—
Negative power supply.
In PCB Layout that must connect all of the VSS pins to the GND plane.
DATA/SDA
Serial data input/output pin. Data is input to / comes out from the shift register at rising
edge of the clock.
I/O •• I²C interface serial data (SDA) Input/Output. NMOS open-drain output
•• 4-wire serial interface serial data input/output. Input has pull-high resistor and output is
CMOS type.
WRB/SCL
Serial clock input pin.
I
•• I²C interface serial clock SCL input.
•• 4-wire serial interface WRITE Clock (CLK) input. Connected to pull-high resistor. Data
on the DATA line is latched into the device on the rising edge of the WRB signal.
RDB/A1
•• I²C interface device address data input pin.
•• 4-wire serial interface READ clock input. Connected to pull-high resistor. The device
I
RAM data is clocked out on the falling edge of RDB. The clocked out data will appear
on the DATA line. The host controller can use the next rising edge to latch the clocked
out data.
CSB/A0
•• I²C interface device address data input pin.
•• Chip select input. Connected to pull-high resistor. When CSB is high, a data and
I
command instruction read from or written to the device is disabled and the serial
interface circuit is also reset. If CSB is low data and command instruction transmission
between the host controller and the device is enabled.
OSC
•• If the RC MASTER MODE command is programmed, the system clock is sourced from
I/O
the internal RC oscillator and the system clock is output on the OSC pin.
•• If the SLAVE MODE or EXT CLK MASTER MODE command is programmed, the
system clock is sourced from an external clock on the OSC pin.
SYNC
•• If the RC MASTER MODE or EXT CLK MASTER MODE command is programmed, the
I/O
synchronous signal is output on the SYNC pin.
•• If the SLAVE MODE command is programmed, the synchronous signal is input on the
SYNC pin.
Absolute Maximum Ratings
Supply Voltage ��������������������������������������������������������������������������������������������������������������������������� VSS-0.3V to VSS+6.0V
Max junction Temperature (Tj).......................... 125˚C Thermal Resistance (Rth).................................40˚C/W
Storage Temperature............................. -50˚C to 125˚C
Operating Temperature........................... -40˚C to 85˚C
Power Dissipation (PD)(@Ta=25˚C)...................2.5W
(@Ta=85˚C)....................1.0W
Input Voltage............................. VSS-0.3V to VDD+0.3V
Note: 1. These are stress ratings only. Stresses exceeding the range specified under “Absolute Maximum Ratings”
may cause substantial damage to the device. Functional operation of this device at other conditions
beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may
affect device reliability.
2. For the actual usage, please refer to the PD-Ta characteristics diagram in the package specification, follow
the power supply voltage, load and ambient temperature conditions to ensure that there is enough margin
and the thermal design does not exceed the allowable value.
Rev. 1.20
3
August 26, 2015