English
Language : 

HT95R22 Datasheet, PDF (28/52 Pages) Holtek Semiconductor Inc – I/O Type Phone 8-bit MCU
HT95R22
Oscillator
There are two oscillator circuits within the controller. One is for the system clock which uses an externally connected
32768Hz crystal. The other is an internal watchdog oscillator.
System Crystal/Ceramic Oscillator
The system clock is generated using an external 32768Hz crystal or ceramic resonator connected between pins X1
and X2. From this clock source an internal circuit generates a 3.58MHz clock source which is also required by the sys-
tem. This frequency generator circuit requires the addition of externally connected RC components to pin XC to form a
low pass filter for the 3.58MHz output frequency stabilisation.
X1
X2
15kW
XC
3nF
47nF
Crystal/Ceramic Oscillator
Watchdog Timer Oscillator
The WDT oscillator is a fully integrated free running RC oscillator with a typical period of 65ms at 5V, requiring no exter-
nal components. It is selected via configuration option. If selected, when the device enters the Power Down Mode, the
system clock will stop running, however the WDT oscillator will continue to run and keep the watchdog function active.
However, as the WDT will consume a certain amount of power when in the Power Down Mode, for low power applica-
tions, it may be desirable to disable the WDT oscillator by configuration option.
Operation Mode, Power-down and Wake-up
There are four operational modes, known as the idle mode, sleep mode, green mode, and normal mode. The chosen
mode is selected using the MODE0, MODE1 and UPEN bits in the MODE register but also depends upon whether the
HALT instruction has been executed or not.
HALT
Instruction
Not executed
Not executed
Executed
Executed
MODE1
1
0
0
0
MODE0
X
X
0
1
UPEN
1
0
0
0
Operation
Mode
Normal
Green
Sleep
Idle
32768Hz
ON
ON
ON
OFF
3.58MHz
ON
OFF
OFF
OFF
System
Clock
3.58MHz
32768Hz
Stopped
Stopped
Note: ²X² means don¢t care
MODE0 will be cleared to 0 automatically after wake-up from Idle Mode.
b7
M O DE1 M O DE0 UPEN
b0
M O D E R e g is te r
N o t im p le m e n te d , r e a d a s " 0 "
F r e q u e n c y u p c o n v e r s io n to g e n e r a te 3 .5 8 M H z e n a b le
1 : e n a b le
0 : d is a b le
3 2 7 6 8 H z o s c illa to r e n a b le w h ile th e H A L T in s tr u c tio n is e x e c u te
1 : d is a b le 3 2 7 6 8 H z o s c illa to r ( Id le m o d e )
0 : e n a b le 3 2 7 6 8 H z o s c illa to r ( S le e p m o d e )
S y s te m c lo c k s e le c t
1 : s e le c t 3 .5 8 M H z a s C P U c lo c k s y s te m
0 : s e le c t 3 2 7 6 8 H z a s C P U c lo c k s y s te m
MODE Register
Rev. 1.00
28
January 6, 2009