HT49RU80 Datasheet, PDF (26/54 Pages) Holtek Semiconductor Inc – LCD Type 8-Bit MCU

HT49RU80/HT49CU80
The LCD driver requires a clock source for proper operation. The LCD clock source is sourced from the general pur-
pose prescaler whose frequency value is determined by configuration options. The LCD clock frequency should be se-
lected to be as close to 4kHz as possible. The LCD clock frequency options are listed in the following table.
LCD Clock Source
Same as WDT clock source f_S
Prescaler Stages
f_S/2²~f_S/2⁸
LCD Segments as Output Port
The SEG40~SEG46 lines, via individual configuration options, can be chosen to be either LCD segment outputs or PD
outputs. When a segment output is selected, the connection to the VMAX pin depends upon the bias and the voltage
that is applied to VLCD. The details are shown in the table. When used as a PD output, V_MAX should be connected to
V_DD.
LCD Type
R Type
C Type
Bias Type
1/2 Bias
1/3 Bias
1/2 Bias
1/3 Bias
V_MAX
If V_DD>V_LCD, user should connect V_MAX to V_DD, If V_DD> 3/2V_LCD, user should connect V_MAX to V_DD,
else connect V_MAX to V_LCD
else connect V_MAX to V₁
Low Voltage Reset/Detector Functions
The device contains low voltage detector, LVD, and low voltage reset, LVR, circuits. These two functions are enabled or
disabled using configuration options. If the configuration options enable the LVD, it can be further enabled or disabled
using software, by changing the value of the RTCC.3 bit. The RTCC.5 bit can be used to read the status of the LVD.
The Low Voltate Reset function, LVR, has the same effect as the external RES signal which executes a chip reset.Its
function is selected via a configuration option. When the device is in the power down mode, the LVR is disabled.
The RTCC register definitions are shown in the table.
Bit No.
0~2
3
4
5
6, 7
Label
RT0~RT2
LVDC
QOSC
LVDO
¾
Read/Write
Function
R/W
8 to 1 multiplexer control inputs to select the real time clock prescaler output
R/W
LVD enable/disable (1/0)
R/W
32768Hz OSC quick start-up - 0/1: quick/slow start
R
LVD detector output (1/0) - 1: low voltage detected
¾
Unused bit, read as ²0²
RTCC (09H) Register
Rev. 1.20
26
December 16, 2009