HT82A520R_11 Datasheet, PDF (18/72 Pages) Holtek Semiconductor Inc – Full Speed USB 8-Bit OTP MCU with SPI

HT82A520R/HT82A620R
D a ta B u s
TM 1 TM 0
L o w B y te
B u ffe r
fS Y S /4
T im e r /E v e n t C o u n te r
M o d e C o n tro l
TO N
TM R
1 6 - B it
P r e lo a d R e g is te r
R e lo a d
TE
H ig h B y te L o w B y te
O v e r flo w
to In te rru p t
1 6 - B it T im e r /E v e n t C o u n te r
16-bit Timer/Event Counter Structure
To achieve a maximum full range count of FFFFH, the
preload registers must first be cleared to all zeros. It
should be noted that after power-on, the preload register
will be in an unknown condition. Note that if the
Timer/Event Counter is switched off and data is written
to its preload registers, this data will be immediately writ-
ten into the actual timer registers. However, if the
Timer/Event Counter is enabled and counting, any new
data written into the preload data registers during this
period will remain in the preload registers and will only
be written into the timer registers the next time an over-
flow occurs.
For the 16-bit Timer/Event Counter which has both low
byte and high byte timer registers, accessing these reg-
isters is carried out in a specific way. It must be note
when using instructions to preload data into the low byte
timer register, namely TMRL, the data will only be
placed in a low byte buffer and not directly into the low
byte timer register. The actual transfer of the data into
the low byte timer register is only carried out when a
write to its associated high byte timer register, namely
TMRH, is executed. On the other hand, using instruc-
tions to preload data into the high byte timer register will
result in the data being directly written to the high byte
timer register. At the same time the data in the low byte
buffer will be transferred into its associated low byte
timer register. For this reason, the low byte timer regis-
ter should be written first when preloading data into the
16-bit timer registers. It must also be noted that to read
the contents of the low byte timer register, a read to the
high byte timer register must be executed first to latch
the contents of the low byte timer register into its associ-
ated low byte buffer. After this has been done, the low
byte timer register can be read in the normal way. Note
that reading the low byte timer register will result in read-
ing the previously latched contents of the low byte buffer
and not the actual contents of the low byte timer register.
Timer Control Register - TMRC
The flexible features of the Holtek microcontroller
Timer/Event Counters enable them to operate in three
different modes, the options of which are determined by
the contents of their control register, which has the
name TMRC. It is the Timer Control Register together
with its corresponding timer register that control the full
operation of the Timer/Event Counter. Before the
Timer/Event Counter can be used, it is essential that the
Timer Control Register is fully programmed with the
right data to ensure its correct operation, a process that
is normally carried out during program initialisation.
b7
TM 1
TM 0
TO N
TE
b0
T M R C R e g is te r
N o t im p le m e n te d , r e a d a s " 0 "
E v e n t C o u n te r a c tiv e e d g e s e le c t
1 : c o u n t o n fa llin g e d g e
0 : c o u n t o n r is in g e d g e
P u ls e W id th M e a s u r e m e n t a c tiv e e d g e s e le c t
1 : s ta r t c o u n tin g o n r is in g e d g e , s to p o n fa llin g e d g e
0 : s ta r t c o u n tin g o n fa llin g e d g e , s to p o n r is in g e d g e
T im e r /E v e n t C o u n te r c o u n tin g e n a b le
1 : e n a b le
0 : d is a b le
N o t im p le m e n te d , r e a d a s " 0 "
O p e r a tin g m o d e s e le c t
TM 1 TM 0
0
0
0
1
1
0
1
1
n o m o d e a v a ila b le
e v e n t c o u n te r m o d e
tim e r m o d e
p u ls e w id th m e a s u r e m e n t m o d e
Timer/Event Counter Control Register
Rev.1.30
18
January 14, 2011