BS66F340 Datasheet, PDF (171/256 Pages) Holtek Semiconductor Inc – Enhanced Touch A/D Flash MCU with LED Driver

BS66F340/BS66F350/BS66F360/BS66F370
Enhanced Touch A/D Flash MCU with LED Driver
There are also two control registers for the SPI interface, SIMC0 and SIMC2. Note that the SIMC2
register also has the name SIMA which is used by the I²C function. The SIMC1 register is not used
by the SPI function, only by the I²C function. Register SIMC0 is used to control the enable/disable
function and to set the data transmission clock frequency. Register SIMC2 is used for other control
functions such as LSB/MSB selection, write collision flag, etc.
• SIMC0 Register
Bit
Name
R/W
POR
7
SIM2
R/W
1
6
SIM1
R/W
1
5
SIM0
R/W
1
4
3
2
1
0
— SIMDEB1 SIMDEB0 SIMEN SIMICF
—
R/W
R/W
R/W
R/W
—
0
0
0
0
Bit 7~5
Bit 4
Bit 3~2
Bit 1
Bit 0
SIM2~SIM0: SIM Operating Mode Control
000: SPI master mode; SPI clock is fSYS /4
001: SPI master mode; SPI clock is fSYS /16
010: SPI master mode; SPI clock is fSYS /64
011: SPI master mode; SPI clock is fSUB
100: SPI master mode; SPI clock is CTM0 CCRP match frequency/2
101: SPI slave mode
110: I²C slave mode
111: Non SIM function
These bits setup the overall operating mode of the SIM function. As well as selecting
if the I²C or SPI function, they are used to control the SPI Master/Slave selection and
the SPI Master clock frequency. The SPI clock is a function of the system clock but
can also be chosen to be sourced from CTM0. If the SPI Slave Mode is selected then
the clock will be supplied by an external Master device.
Unimplemented, read as "0"
SIMDEB1~SIMDEB0: I²C Debounce Time Selection
Described elsewhere.
SIMEN: SIM Enable Control
0: Disable
1: Enable
The bit is the overall on/off control for the SIM interface. When the SIMEN bit is
cleared to zero to disable the SIM interface, the SDI, SDO, SCK and SCS, or SDA and
SCL lines will lose their SPI or I²C function and the SIM operating current will be
reduced to a minimum value. When the bit is high the SIM interface is enabled. The
SIM configuration option must have first enabled the SIM interface for this bit to be
effective.If the SIM is configured to operate as an SPI interface via the SIM2~SIM0
bits, the contents of the SPI control registers will remain at the previous settings when
the SIMEN bit changes from low to high and should therefore be first initialised by
the application program. If the SIM is configured to operate as an I²C interface via the
SIM2~SIM0 bits and the SIMEN bit changes from low to high, the contents of the I²C
control bits such as HTX and TXAK will remain at the previous settings and should
therefore be first initialised by the application program while the relevant I²C flags
such as HCF, HAAS, HBB, SRW and RXAK will be set to their default states.
SIMICF: SIM SPI slave mode Incomplete Transfer Flag
0: SIM SPI slave mode incomplete condition not occurred
1: SIM SPI slave mode incomplete condition occured
This bit is only available when the SIM is configured to operate in an SPI slave mode.
If the SPI operates in the slave mode with the SIMEN and CSEN bits both being set
to 1 but the SCS line is pulled high by the external master device before the SPI data
transfer is completely finished, the SIMICF bit will be set to 1 together with the TRF
bit. When this condition occurs, the corresponding interrupt will occur if the interrupt
function is enabled. However, the TRF bit will not be set to 1 if the SIMICF bit is set
to 1 by software application program.
Rev. 1.40
171
December 15, 2016