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BS67F340 Datasheet, PDF (160/281 Pages) Holtek Semiconductor Inc – Enhanced Touch A/D Flash MCU with LCD Driver
BS67F340/BS67F350/BS67F360/BS67F370
Enhanced Touch A/D Flash MCU with LCD Driver
Timer/Counter Mode
To select this mode, bits PTM1 and PTM0 in the PTMC1 register should be set to 11 respectively.
The Timer/Counter Mode operates in an identical way to the Compare Match Output Mode
generating the same interrupt flags. The exception is that in the Timer/Counter Mode the PTM
output pin is not used. Therefore the above description and Timing Diagrams for the Compare
Match Output Mode can be used to understand its function. As the PTM output pin is not used in
this mode, the pin can be used as a normal I/O pin or other pin-shared function.
PWM Output Mode
To select this mode, bits PTM1 and PTM0 in the PTMC1 register should be set to 10 respectively
and also the PTIO1 and PTIO0 bits should be set to 10 respectively. The PWM function within
the PTM is useful for applications which require functions such as motor control, heating control,
illumination control, etc. By providing a signal of fixed frequency but of varying duty cycle on the
PTM output pin, a square wave AC waveform can be generated with varying equivalent DC RMS
values.
As both the period and duty cycle of the PWM waveform can be controlled, the choice of generated
waveform is extremely flexible. In the PWM mode, the PTCCLR bit has no effect as the PWM
period. Both of the CCRP and CCRA registers are used to generate the PWM waveform, one register
is used to clear the internal counter and thus control the PWM waveform frequency, while the other
one is used to control the duty cycle. The PWM waveform frequency and duty cycle can therefore
be controlled by the values in the CCRA and CCRP registers.
An interrupt flag, one for each of the CCRA and CCRP, will be generated when a compare match
occurs from either Comparator A or Comparator P. The PTOC bit in the PTMC1 register is used to
select the required polarity of the PWM waveform while the two PTIO1 and PTIO0 bits are used to
enable the PWM output or to force the PTM output pin to a fixed high or low level. The PTPOL bit
is used to reverse the polarity of the PWM output waveform.
• 10-bit PTM, PWM Mode
CCRP
Period
Duty
1~1023
1~1023
CCRA
0
1024
If fSYS=16MHz, TM clock source select fSYS/4, CCRP=512 and CCRA=128,
The PTM PWM output frequency=(fSYS/4)/512=fSYS/2048=7.8125kHz, duty=128/512=25%,
If the Duty value defined by the CCRA register is equal to or greater than the Period value, then the
PWM output duty is 100%.
Rev. 1.40
160
December 15, 2016