HT46R94 Datasheet, PDF (14/62 Pages) Holtek Semiconductor Inc – A/D Type 8-Bit MCU with 16
16 High Current LED Driver

HT46R94
In addition, on entering an interrupt sequence or execut-
ing a subroutine call, the status register will not be
pushed onto the stack automatically. If the contents of
the status registers are important and if the subroutine
can corrupt the status register, precautions must be
taken to correctly save it.
Interrupt Control Registers - INTC0, INTC1
These 8-bit registers, known as INTC0 and INTC1, con-
trol the operation of both the external and internal inter-
rupts. By setting various bits within these registers using
standard bit manipulation instructions, the enable/dis-
able function of the external interrupts and each of the
internal interrupts can be independently controlled. A
master interrupt bit within these registers, the EMI bit,
acts like a global enable/disable and is used to set all of
the interrupt enable bits on or off. This bit is cleared
when an interrupt routine is entered to disable further in-
terrupt and is set by executing the RETI² instruction.
Timer/Event Counter Registers - TMR0, TMR0C,
TMR1, TMR1C
The device contains two integrated 8-bit count up Timer/
Event Counters. These have associated registers
known as TMR0 and TMR1, where the timer¢s values
are located. Two associated control registers, known as
TMR0C and TMR1C contain the setup information for
these two timers. Note that all timer registers can be di-
rectly written to in order to preload their contents with
fixed data to allow different time intervals to be setup.
Input/Output Ports and Control Registers
Within the area of Special Function Registers, the I/O
registers and their associated control registers play a
prominent role. All I/O and output ports have a desig-
nated register correspondingly labeled as PA, PB, PC,
PD and PE. These labeled I/O registers are mapped to
specific addresses within the Data Memory as shown in
the Data Memory table, which are used to transfer the
appropriate output or input data on that port. For the I/O
ports, PA and PB, there is an associated control register
labeled PAC and PBC, also mapped to specific ad-
dresses with the Data Memory. The control register
specifies which pins of that port are set as inputs and
which are set as outputs. To setup a pin as an input, the
corresponding bit of the control register must be set
high, for an output it must be set low. During program ini-
tialisation, it is important to first setup the control regis-
ters to specify which pins are outputs and which are
inputs before reading data from or writing data to the I/O
ports. One flexible feature of these registers is the ability
to directly program single bits using the ²SET [m].i² and
²CLR [m].i² instructions. The ability to change I/O pins
from output to input and vice versa by manipulating spe-
cific bits of the I/O control registers during normal pro-
gram operation is a useful feature of these devices.
PC, PD and PE are output ports only and therefore do
not have control registers.
Setting its output register high which effectively places
its NMOS output transistor in high impedance state. Re-
setting output register to low will force to output low
state.
Pulse Width Modulator Registers -
PWM0, PWM1, PWM2
The device contains three Pulse Width Modulators.
Each one has its own related independent control regis-
ter, with the names PWM0, PWM1 and PWM2. The 8-bit
contents of these registers, defines the duty cycle value
for the modulation cycle of the corresponding Pulse
Width Modulator.
A/D Converter Registers - ADRL, ADRH,
ADCR, ACSR
The device contains a 8-channel 12-bit A/D converter.
The correct operation of the A/D requires the use of two
data registers, a control register and a clock source reg-
ister. A high byte data register known as ADRH, and a
low byte data register known as ADRL. These are the
register locations where the digital value is placed after
the completion of an analog to digital conversion cycle.
The channel selection and configuration of the A/D con-
verter is setup via the control register ADCR while the
A/D clock frequency is defined by the clock source reg-
ister, ACSR.
Mode Register - MODE
The Mode Register is used to select the Mode of Opera-
tion which can be either Normal, Slow or Power-down. It
also contains a bit to control the quick start up function of
the 32768Hz oscillator.
LCD Control Register - LCDC
The LCDC register is used to setup various functions for
the LCD display. Functions such as 1/2 bias enable for
each COM line, bias resistor and LCD enable are setup
with this register.
Input/Output Ports
Holtek microcontrollers offer considerable flexibility on
their I/O ports. With the input or output designation of
PA, PB pin fully under user program control, pull-high
options and wake-up options on PA pins, the user is pro-
vided with an I/O structure to meet the needs of a wide
range of application possibilities.
The device offers up to 16 bidirectional input/output
lines on ports PA and PB. There are also outputs on
ports PC, PD and PE. These I/O ports are mapped to
the Data Memory with specific addresses as shown in
the Special Purpose Data Memory table. For input oper-
ation, these ports are non-latching, which means the in-
Rev. 1.10
14
November 5, 2008