HT66F20_13 Datasheet, PDF (121/298 Pages) Holtek Semiconductor Inc – Enhanced A/D Flash Type 8-Bit MCU with EEPROM

HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
Enhanced A/D Flash Type 8-Bit MCU with EEPROM
PWM Output Mode
To select this mode, bits TnM1 and TnM0 in the TMnC1 register should be set to 10 respectively.
ThePWMfunction within the TM is useful for applications which require functions such as motor
control, heating control, illumination control etc. By providing a signal of fixed frequency but
of varying duty cycle on the TM output pin, a square wave AC waveform can be generated with
varying equivalent DC RMS values.
As both the period and duty cycle of the PWM waveform can be controlled, the choice of generated
waveform is extremely flexible. In the PWM mode, the TnCCLR bit has no effect on the PWM
operation. Both of the CCRA and CCRP registers are used to generate the PWM waveform, one
register is used to clear the internal counter and thus control the PWM waveform frequency, while
the other one is used to control the duty cycle. Which register is used to control either frequency
or duty cycle is determined using the TnDPX bit in the TMnC1 register. The PWM waveform
frequency and duty cycle can therefore be controlled by the values in the CCRA and CCRP registers.
An interrupt flag, one for each of the CCRA and CCRP, will be generated when a compare match
occurs from either Comparator A or Comparator P. The TnOC bit in the TMnC1 register is used to
select the required polarity of the PWM waveform while the two TnIO1 and TnIO0 bits are used to
enable the PWM output or to force the TM output pin to a fixed high or low level. The TnPOL bit is
used to reverse the polarity of the PWM output waveform.
CTM, PWM Mode, Edge-aligned Mode, TnDPX=0
CCRP
Period
Duty
001b
128
010b
256
011b
384
100b
101b
512
640
CCRA
110b
768
111b
896
000b
1024
If fSYS=16MHz, TM clock source is fSYS/4, CCRP=100b and CCRA=128,
The CTM PWM output frequency=(fSYS/4)/512=fSYS/2048=7.8125kHz, duty=128/512=25%.
If the Duty value defined by the CCRA register is equal to or greater than the Period value, then the
PWM output duty is 100%.
CTM, PWM Mode, Edge-aligned Mode, TnDPX=1
CCRP
Period
Duty
001b
128
010b
256
011b
384
100b
101b
CCRA
512
640
110b
768
111b
896
000b
1024
The PWM output period is determined by the CCRAregister value together with the TM clock while
the PWM duty cycle is defined by the CCRP register value.
Rev. 1.90
121
February 18, 2013