HT66F20_11 Datasheet, PDF (104/259 Pages) Holtek Semiconductor Inc – Enhanced A/D Flash Type MCU 8-Bit MCU with EEPROM

HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
Standard Type TM - STM
The Standard Type TM contains five operating modes, which are Compare Match Output, Timer/Event Counter, Cap-
ture Input, Single Pulse Output and PWM Output modes. The Standard TM can also be controlled with an external in-
put pin and can drive one or two external output pins.
CTM
HT66F20
Name
10-bit STM
TM No.
1
TM Input Pin
TCK1
TM Output Pin
TP1_0, TP1_1
HT66F30
¾
¾
HT66F40
16-bit STM
2
HT66F50
16-bit STM
2
HT66F60
16-bit STM
2
¾
TCK2
TCK2
TCK2
¾
TP2_0, TP2_1
TP2_0, TP2_1
TP2_0, TP2_1
Standard TM Operation
There are two sizes of Standard TMs, one is 10-bits
wide and the other is 16-bits wide. At the core is a 10 or
16-bit count-up counter which is driven by a user
selectable internal or external clock source. There are
also two internal comparators with the names, Com-
parator A and Comparator P. These comparators will
compare the value in the counter with CCRP and CCRA
registers. The CCRP comparator is 3 or 8-bits wide
whose value is compared the with highest 3 or 8 bits in
the counter while the CCRA is the ten or sixteen bits and
therefore compares all counter bits.
The only way of changing the value of the 10 or 16-bit
counter using the application program, is to clear the
counter by changing the TnON bit from low to high. The
counter will also be cleared automatically by a counter
overflow or a compare match with one of its associated
comparators. When these conditions occur, a TM inter-
rupt signal will also usually be generated. The Standard
Type TM can operate in a number of different opera-
tional modes, can be driven by different clock sources
including an input pin and can also control an output pin.
All operating setup conditions are selected using rele-
vant internal registers.
Standard Type TM Register Description
Overall operation of the Standard TM is controlled using
a series of registers. A read only register pair exists to
store the internal counter 10 or 16-bit value, while a
read/write register pair exists to store the internal 10 or
16-bit CCRA value. The remaining two registers are
control registers which setup the different operating and
control modes as well as the three or eight CCRP bits.
CCRP
3 o r 8 - b it C o m p a r a to r P
C o m p a ra to r P M a tc h
T n P F In te rru p t
fS Y S /4
000
fS Y S
001
fH /1 6
010
fH /6 4
011
fT B C
100
R e s e rv e d
101
110
TC Kn
111
TnO N
TnP A U
TnC K 2~TnC K 0
b7~b9 orb8~b15
TnO C
1 0 o r 1 6 - b it C o u n t- u p C o u n te r
b0~b9 or
b0~b15
C o u n te r C le a r 0
1
TnC C LR
O u tp u t
C o n tro l
P o la r ity
C o n tro l
T P n P in
In p u t/O u tp u t
TnM 1,TnM 0
T n IO 1 , T n IO 0
TnP O L
1 0 o r 1 6 - b it
C o m p a ra to r A
CCRA
C o m p a ra to r A M a tc h
T n IO 1 , T n IO 0
E dge
D e te c to r
Standard Type TM Block Diagram
T n A F In te rru p t
TP n_0
TP n_1
Rev. 1.50
104
March 15, 2011