BC68F2130 Datasheet, PDF (101/148 Pages) Holtek Semiconductor Inc – Sub-1GHz RF Transmitter Flash MCU

BC68F2130/BC68F2140
Sub-1GHz RF Transmitter Flash MCU
RF_OPER Register – RF Operation Control Register
Bit
7
6
5
4
3
2
1
0
Name
—
— FSK_EN DIR_EN —
—
— TX_STROBE
R/W
—
—
R/W
R/W
—
—
—
R/W
POR
—
—
0
0
—
—
—
0
Bit 7~6
Bit 5
Bit 4
Bit 3~1
Bit 0
Unimplemented, read as “0”
FSK_EN: RF output modulation mode selection
0: OOK Mode, PAD enable is controlled by TXD directly
1: FSK Mode, PAD enable is forced to 1 and TXD modulates the TX frequency
DIR_EN: RF output operating mode selection
0: Burst Mode, TX data is read from FIFO, RF is controlled by state machine (if
FIFO transmission is complete, RF TX will enter the standby mode)
1: Direct Mode, TX data comes from DTXD bit in the RF_FIFO_CTRL4 register
directly and RF state is controlled by SX_EN (first enable) and TX_EN (second
enable)
Unimplemented, read as “0”
TX_STROBE: TX strobe to start the burst mode data transfer from RF
0: TX packet has been sent completely
1: Initial a TX transmission
Setting this bit high will initial the TX transmission procedure automatically, in which
condition, all register settings are not allowed to change. This bit will be cleared to
0 automatically when a TX packet has been sent completely, in which condition, a
BMTCF interrupt request will be generated. Users should start the next transmission
after this bit returns to 0. Users can force the TX transmission to teminate by writting
a 0 value to this bit.
RF_MOD1 Register – RF Modulator Control Register 1
Bit
Name
R/W
POR
7
FDEV7
R/W
1
6
FDEV6
R/W
0
5
FDEV5
R/W
0
4
FDEV4
R/W
1
3
FDEV3
R/W
0
2
FDEV2
R/W
0
1
FDEV1
R/W
0
0
FDEV0
R/W
0
Bit 7~0
FDEV7~FDEV0: Set the frequency deviation in FSK mode
These bits together with the FDEV10~FDEV9 bits in the RF_MOD2 register set the
frequency deviation in FSK mode.
RF_MOD2 Register – RF Modulator Control Register 2
Bit
7
6
5
4
3
2
1
0
Name
—
—
—
—
—
FDEV10 FDEV9 FDEV8
R/W
—
—
—
—
—
R/W
R/W
R/W
POR
—
—
—
—
—
0
0
1
Bit 7~3
Bit 2~0
Unimplemented, read as “0”
FDEV10~FDEV8: Set the frequency deviation in FSK mode
These bits together with the FDEV7~FDEV0 bits in the RF_MOD1 register set the
frequency deviation in FSK mode.
FDEV[10:0]=DEC2HEX (INT((2¹⁷-1)/fXTAL)×fD))
For example, if fXTAL=16MHz, XODIV2=0, fD=50kHz, then FDEV[10:0]=19BH.
Rev. 1.10
101
May 19, 2017