HT66F0175 Datasheet, PDF (100/207 Pages) Holtek Semiconductor Inc – A/D Flash MCU with EEPROM

HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
Capture Input Mode
To select this mode bits TnM1 and TnM0 in the TMnC1 register should be set to 01 respectively.
This mode enables external signals to capture and store the present value of the internal counter
and can therefore be used for applications such as pulse width measurements. The external signal
is supplied on the TPn pin, whose active edge can be a rising edge, a falling edge or both rising
and falling edges; the active edge transition type is selected using the TnIO1 and TnIO0 bits in
the TMnC1 register. The counter is started when the TnON bit changes from low to high which is
initiated using the application program.
When the required edge transition appears on the TPn pin the present value in the counter will be
latched into the CCRA registers and a TMn interrupt generated. Irrespective of what events occur on
the TPn pin the counter will continue to free run until the TnON bit changes from high to low. When
a CCRP compare match occurs the counter will reset back to zero; in this way the CCRP value
can be used to control the maximum counter value. When a CCRP compare match occurs from
Comparator P, a TMn interrupt will also be generated. Counting the number of overflow interrupt
signals from the CCRP can be a useful method in measuring long pulse widths. The TnIO1 and
TnIO0 bits can select the active trigger edge on the TPn pin to be a rising edge, falling edge or both
edge types. If the TnIO1 and TnIO0 bits are both set high, then no capture operation will take place
irrespective of what happens on the TPn pin, however it must be noted that the counter will continue
to run. The TnCCLR and TnDPX bits are not used in this Mode.
Rev. 1.40
100
December 06, 2016