HT82V38_14 Datasheet, PDF (1/16 Pages) Holtek Semiconductor Inc – 16-Bit CCD/CIS Analog Signal Processor

HT82V38
16-Bit CCD/CIS Analog Signal Processor
Features
· Operating voltage: 3.3V (typ.)
· Low Power CMOS: 300 mW (typ.)
· Power-Down Mode: 10mA (max.)
· 16-Bit 30 MSPS A/D converter
· Guaranteed won¢t miss codes
· 1~5.85x programmable gain
· Correlated double sampling
· ±250 mV programmable offset
· Input clamp circuitry
· Internal voltage reference
· Multiplexed byte-wide output (8+8 format)
· Programmable 3-wire serial interface
· 3 .3V digital I/O compatibility
· 3-Channel operation up to 30 MSPS
· 2-Channel (even-odd) operation up to 30 MSPS
· 1-Channel operation up to 20 MSPS
· 28-pin SSOP (209mil) package
Applications
· Flatbed document scanners
· Film scanners
· Digital color copiers
· Multifunction peripherals
General Description
The HT82V38 is a complete analog signal processor for
CCD imaging applications. It features a 3 channel archi-
tecture designed to sample and condition the outputs of
trilinear color CCD arrays. Each channel consists of an
input clamp, Correlated Double Sampler (CDS), offset
DAC and Programmable Gain Amplifier (PGA), multi-
plexed to a high performance 16-bit A/D converter.
The CDS amplifiers may be disabled for use with sen-
sors such as Contact Image Sensors (CIS) and CMOS
active pixel sensors, which do not require CDS.
The 16-bit digital output is multiplexed into an 8-bit out-
put word that is accessed using two read cycles. The in-
ternal registers are programmed through a 3-wire serial
interface, and provide adjustment of the gain, offset, and
operating mode.
Block Diagram
AVD D AVSS R EFT R EFB
AVDD AVSS
DVDD DVSS
V IN R
V IN G
V IN B
O FFSET
Rev. 1.30
CDS
+
PG A
9 - B it
DAC
CDS
+
9 - B it
DAC
CDS
+
9 - B it
DAC
In p u t
C la m p
B ia s
BANDG AP
R e fe re n c e
PG A
3 .1
M UX
1 6 - B it
16
ADC
PG A
6
RED
G REEN
B LU E
C o n fig u r a tio n
R e g is te r
M UX
R e g is te r
G a in
R e g is te r s
9
RED
G REEN
B LU E
O ffs e t
R e g is te r s
C D S C LK 1 C D S C LK 2
A D C C LK
1 6 :8
8
M UX
D ig ita l
C o n tro l
In te rfa c e
OE
DOUT
S C LK
S LO A D
SD ATA
1
August 13, 2014