HT82V24 Datasheet, PDF (1/21 Pages) Holtek Semiconductor Inc – 16-Bit, 15MSPS, 3-Channel CCD/CIS Analog Signal Processor

HT82V24
16-Bit, 15MSPS, 3-Channel CCD/CIS Analog Signal Processor
Features
· Operating voltage: 5V
· Low power consumption at 380mW (Typ.)
· Power-down mode: Under 2mA (Typ.)
· 16-bit 15 MSPS A/D converter
· Supports ADI/WM mode data output formats selec-
tion
· Guaranteed won¢t miss codes
· 1~6x programmable gain
· Correlated Double Sampling
· ±300mV programmable offset
· Input clamp circuitry
· Internal voltage reference
· Multiplexed byte/nibble-wide output (8´2/4´4 format)
· Programmable 3-wire serial interface
· 3V/5V digital I/O compatibility
· 3-channel operation up to 5 MSPS for each channel
· 2-channel (Even-Odd) operation up to 7.5 MSPS for
each channel
· 1-channel operation up to 15 MSPS
· 20/28-pin SOP/SSOP package (Pb-free on request)
Applications
Flatbed document scanners
Film scanners
Digital color copiers
Multifunction peripherals
General Description
The HT82V24 is a complete analog signal processor for
CCD imaging applications. It features a 3-channel archi-
tecture designed to sample and condition the outputs of
tri-linear color CCD arrays. Each channel consists of an
input clamp, Correlated Double Sampler (CDS), offset
DAC and Programmable Gain Amplifier (PGA), and a
high performance 16-bit A/D converter.
The CDS amplifiers may be disabled for use with sen-
sors such as Contact Image Sensors (CIS) and CMOS
active pixel sensors, which do not require CDS.
The 16-bit digital output is multiplexed into an 8/4-bit
output word that is accessed using two/four read cycles.
The internal registers are programmed through a 3-wire
serial interface, which provides gain, offset and operat-
ing mode adjustments. HT82V24 supports ADI/WM
mode data output formats.
The HT82V24 operates from a single 5V power supply,
typically consumes 380mW of power.
Block Diagram
AVD D AVSS R EFT R EFB
AVDD AVSS
DVDD DVSS
V IN R
V IN G
V IN B
O FFSET
CDS
+
PG A
9 - B it
DAC
CDS
+
9 - B it
DAC
CDS
+
9 - B it
DAC
In p u t
C la m p
B ia s
BANDG AP
R e fe re n c e
PG A
3 .1
M UX
1 6 - B it
16
ADC
PG A
6
RED
G REEN
B LU E
C o n fig u r a tio n
R e g is te r
M UX
R e g is te r
G a in
R e g is te r s
9
RED
G REEN
B LU E
O ffs e t
R e g is te r s
C D S C L K 1 /V S M P C D S C L K 2
A D C C LK
OE
8 or4
M UX
DOUT
D ig ita l
C o n tro l
In te rfa c e
S C LK
S LO A D
SD ATA
Rev. 1.00
1
September 7, 2005