HT82J97E_08 Datasheet, PDF (1/44 Pages) Holtek Semiconductor Inc – USB Joystick Encoder 8-Bit MCU

HT82J97E/HT82J97A
USB Joystick Encoder 8-Bit MCU
Technical Document
· Tools Information
· FAQs
· Application Note
Features
· Flexible total solution for applications that combine
PS/2 and low-speed USB interface, such as mice,
joysticks, and many others
· USB Specification Compliance
- Conforms to USB specification V1.1
- Conforms to USB HID specification V1.1
· Supports 1 Low-speed USB control endpoint and 1
interrupt endpoint
· Each endpoint has 8´8 bytes FIFO
· Integrated USB transceiver
· 3.3V regulator output
· External 6MHz or 12MHz ceramic resonator or crystal
· 8-bit RISC microcontroller, with 2K´14 EPROM
(000H~7FFH)
· 96 bytes RAM (20H~7FH)
· 6MHz/12MHz internal CPU clock
· 4-level stacks
· Two 8-bit indirect addressing registers
· One 16-bit programmable timer counter with over-
flow interrupt (shared with PA7, vector 0CH)
· One USB interrupt input (vector 04H)
· HALT function and wake-up feature reduce power
consumption
· PA0~PA7 support wake-up function
· Internal Power-On reset (POR)
· Watchdog Timer (WDT)
· 20 I/O ports (including 2-PWM output, PC2, PC3)
· 2 PWM output (PC2, PC3)
· Can produce PWM frequency range from 23Hz to
23kHz
· Built-in 8-bit Analog-to-Digital Converter, (6-channel
for internal mode (PB0~PB5), 6-channel for external
mode with VHL (PB7) and VRL (PB6))
· 20/28-pin SOP package
General Description
The USB MCU OTP body is suitable for USB mouse
and USB joystick devices. It consists of a Holtek high
performance 8-bit MCU core for control unit, built-in
USB SIE, 2K´14 EPROM and 96 bytes data RAM.
Block Diagram
P ro g ra m
ROM
U S B D + /C L K U S B D -/D A T A V 3 3 O
P ro g ra m
C o u n te r
U S B 1 .1
PS2
BP
STAC K
In te rru p t
C ir c u it
IN T C
In s tr u c tio n
R e g is te r
MP
M
U
X
D ATA
M e m o ry
In s tr u c tio n
D ecoder
T im in g
G e n e ra to r
O SC2
O SC1
RES
VDD
VSS
M UX
A LU
S h ifte r
STATU S
ACC
M
fS Y S /4
TM R 0
U
X
P A 7 /T M R
TM R 0C
E N /D IS
W D TS
M
W D T P r e s c a le r
W DT
U
X
S Y S C L K /4
W DT O SC
PAC ^{PO RT A}
PA
P A 0~P A 6
P A 7 /T M R
PBC _{PO RT B}
PB
A /D C o n v e rte r
PCC _{PO RT C}
PC
PW M
P B 0 /A N 0 ~ P B 5 /A N 5
P B 6 /V R L
P B 7 /V R H
P C 0~P C 1
P C 2 /P W M 1
P C 3 /P W M 2
Rev. 1.60
1
December 23, 2008