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HT82A623R_11 Datasheet, PDF (1/98 Pages) Holtek Semiconductor Inc – A/D Type Full Speed USB 8-Bit MCU with SPI
HT82A623R/HT82A6208/HT82A6216
A/D Type Full Speed USB 8-Bit MCU with SPI
Technical Document
· Application Note
- HA0075E MCU Reset and Oscillator Circuits Application Note
Features
· Operating voltage:
- VDD (MCU)
fSYS = 6MHz: 2.2V~5.5V
fSYS = 12MHz: 3.0V~5.5V
- UBUS (USB BUS Voltage): 4.5V~5.5V
- VCC (HT82A6208 & HT82A6216 for Flash):
2.8V~3.6V
· 4K´15 bits Program Memory
· 160´8 bits Data Memory RAM
· HT82A6208: 8M´1 bits Flash memory structure
· HT82A6216: 16M´1 bits or 8Mx2 bits Flash memory
structure
· 32 bidirectional I/O lines
· USB 2.0 Full Speed Compatible
· One external interrupt input shared with I/O line
· Two 16-bit programmable Timer/Event Counters
with overflow interrupt
· Two SPI interfaces (master and slave mode) shared
with PA0~PA3, PB0~PB3
· Total of 6 Interrupts - EXT, Timer0, Timer1, SPIA,
SPIB, USB
· Flash Serial Peripheral Interface compatible - Mode0
and Mode3
· 8288608´1bit Flash memory structure - HT82A6208
· 16777216´1bit or 8388608x2bit Flash memory
structure - HT82A6216
· 256 Equal Sector with 4K byte each for Flash
memory structure- HT82A6208
· 512 Equal Sector with 4K byte each for Flash
memory structure- HT82A6216
· Flash Memory Input Data Format: 1-byte Command
code
· Flash Memory Block Lock protection
· Single Power Supply Operation
· Watchdog Timer function
· 32768Hz Real time clock
· Power down and wake-up functions to reduce power
consumption
· 16 channel 12-bit resolution A/D converter
· 2-channel 8-bit PWM output shared with two I/O
lines
· Up to 0.33ms instruction cycle with 12MHz system
clock at VDD=5V
· Max. 4 endpoints supported - endpoint 0 included
· All endpoints support Interrupt, & bulk transfer
· Endpoint 0 supports control, interrupt and bulk
transfer
· All endpoints except endpoint 0 can be configured
as 8, 16, 32, 64 FIFO size
· Endpoint 0 has 8 byte FIFO
· Total FIFO size: 64+8 bytes (RAM0: 48 bytes;
RAM1:16 bytes, 8 bytes for endpoint0)
· 2.2V ± 5% LVD
· 6-level subroutine nesting
· Bit manipulation instruction
· Table read instructions
· 63 powerful instructions
· All instructions executed in one or two instruction
cycles
· Low voltage reset function
· Wide range of available package types
Rev. 1.30
1
January 14, 2011