HT62L256 Datasheet, PDF (1/10 Pages) Holtek Semiconductor Inc – CMOS 32Kx8 Low Power SRAM

Preliminary
HT62L256
CMOS 32K´8 Low Power SRAM
Features
· Operation voltage: 2.7V~3.3V
· Low power consumption:
- Operating current: 20mA max.
- Standby current: 2mA
· High speed access time: 70ns
· Input levels are LVTTL-compatible
· Automatic power down when chip is deselected
· Three state outputs
· Fully static operation
· Data retention supply voltage as low as 2.0V
· Easy expansion with CS and OE options
· 28-pin SOP/TSOP package
General Description
The HT62L256 is a 262,144-bit static random access
memory organized into 32,768 words by 8 bits and oper-
ating from a low power range of 2.7V to 3.3V supply volt-
age. It is fabricated with high performance CMOS
process that provides both high speed and low power
feature with typical standby current of 2mA and maxi-
mum access time of 70ns.
The HT62L256 has an automatic power down feature,
reducing the power consumption significantly when chip
is deselected. The HT62L256 supports the JEDEC
standard 28-pin SOP and TSOP package.
Block Diagram
A0
A 14
CS
WE
OE
VDD
VSS
A d d re s s
B u ffe rs
X -D e c
Y -D e c
M e m o r y C e ll A r r a y
( 3 2 K ´ 8 B its
R e a d /W r ite
C o n tr o l L o g ic
S e n s e A m p lifie r
O u tp u t B u ffe rs
D0
D7
Pin Assignment
A 14 ₁
28 V D D
OE
1
A 12 ₂
27 W E
A 11
A7 ₃
A6 ₄
A5 ₅
A4 ₆
A3 ₇
26 A 13
A9
25 A 8
A8
24 A 9
A 13
WE
23 A 11
VDD
22 O E
A 14
A2 ₈
21 A 10
A 12
A1 ₉
A 0 ₁₀
D 0 ₁₁
D 1 ₁₂
D 2 ₁₃
20 C S
19 D 7
18 D 6
17 D 5
16 D 4
A7
A6
A5
A4
A3
14
V S S ₁₄
15 D 3
H T62L256
2 8 S O P -A
Rev. 0.00
H T62L256
2 8 T S O P -A
1
28
A 10
CS
D7
D6
D5
D4
D3
VSS
D2
D1
D0
A0
A1
15
A2
August 15, 2002