HT23B60 Datasheet, PDF (1/50 Pages) Holtek Semiconductor Inc – 60x11 Pixel Data Bank 8-Bit Mask MCU

HT23B60
60´11 Pixel Data Bank 8-Bit Mask MCU
Features
· Operating voltage range: 2.4V~5.5V
· Program ROM: 32K´16 bits
· Data RAM: 2.3K´8 bits
· 16-bit table read instructions
· Eight-level subroutine nesting
· Timer
- Two 16-bit programmable timer counters
- Real time clock (RTC)
- Watchdog Timer (WDT)
· Four operating modes: Idle mode, Sleep mode,
Green mode and Normal mode
· Built-in 32768Hz x¢tal oscillator circuit
· Build-in circuit dual system clock 32768Hz, 3.58MHz
· Build-in Low Battery detector
· 14 bidirectional I/O lines, 16 bidirectional I/O lines are
share pin with segments
· LCD driver:
- Up to a max. of 60 segments and 11 common
- 660 dots, 1/4 or 1/5 bias capability, 1/10 or 1/11
duty, R type
- LCD com/seg driving strength can be adjusted to
compromise the display quality and current
consumption, adjustable 16-level VLCD
- Segment 0~15 supports Key Scan function
· Build-in a serial-parallel-interface hardware circuit
· Build-in a 8-bit PWM D/A hardware circuit
· 100-pin QFP package
General Description
HT23B60 is an 8-bit CMOS microcontroller with various
functionalities in a compact package such as SRAM,
ROM I/Os, interrupt controller, timer and LCD control-
ler/driver. It¢s suitable for use as electrical data bank,
LCD game, calendar and speech products.
Block Diagram
RES
P ro g ra m
ROM
In s tr u c tio n
R e g is te r
P ro g ra m
C o u n te r
STAC K0
STAC K1
STAC K2
STAC K3
STAC K4
STAC K5
STAC K6
STAC K7
32768H z
R TC
IN T /P B 3
In te rru p t
C ir c u it
IN T C
M P0
M P1
M
U
D ATA
M e m o ry
X
TM R 0
TM R 0C
S Y S C L K /4
TM R 2
M
3 .5 8 M H z /4
U
X _{32768H z}
PW M DAC1
M
U
TM R 2C
X
PFD
M
U
PW M DAC2
X
PW M 1
PW M 2
X IN
XO UT
XC
In s tr u c tio n
D ecoder
T im in g
G e n e ra to r
M UX
A LU
ACC
S h ifte r
STATU S
O S C C ir c u it
3 .5 8 M H z
LC D
M e m o ry
V LC D
COM 0
COM 1
COM 9
C O M 10
SEG 0
SEG 1
S E G 58
S E G 59
L C D D r iv e r
60´11
1 /4 , 1 /5 B ia s
1 /1 0 , 1 /1 1 D u ty
S E G 0~15
K e y S c a n S tro b e
PA
P A 0~P A 7
PAC
PB
P B 0~P B 5
PBC
W D TS
W D T P r e s c a le r
L o w V o lta g e D e te c to r
32768H z
W DT O SC
S y s te m C lo c k /4
L B IN
S e r ia l
In te rfa c e
S C L K /P B 0
D I/P B 2
D O /P B 1
Rev. 1.10
1
March 1, 2004