HMC628LP4 Datasheet, PDF (9/14 Pages) Hittite Microwave Corporation – BiCMOS MMIC 5-Bit DIGITAL VARIABLE GAIN AMPLIFIER, 50 - 800 MHz

HMC628LP4 / 628LP4E
v07.0410
BiCMOS MMIC 5-Bit DIGITAL
VARIABLE GAIN AMPLIFIER, 50 - 800 MHz
12
Power-Up States
If LE is set to logic LOW at power-up, the logic state of
PUP1 and PUP2 determines the power-up state of the
part per PUP truth table. If the LE is set to logic HIGH
at power-up, the logic state of B4-B0 determines the
power-up state of the part per truth table. The DVGA
latches in the desired power-up state approximately
200 ms after power-up.
Power-On Sequence
The ideal power-up sequence is: GND, Vdd, digital
inputs, RF inputs. The relative order of the digital
inputs are not important as long as they are powered
after Vdd / GND
Absolute Maximum Ratings
RF Input Power
20 dBm
RF Output Power
22 dBm
Digital Inputs (B0-B4, Shift Clock,
Latch Enable & Data Input)
-0.5V to Vdd +0.5V
Bias Voltage (Vdd)
5.6 V
Junction Temperature
125 °C
Continuous Pdiss (T = 85 °C)
(derate 13.5 mW/°C above 85 °C) ^{[1] 0.54 W}
Thermal Resistance
(Junction to ground paddle)
74.3 °C/W
Storage Temperature
-65 to +150 °C
Operating Temperature
-40 to +85 °C
Bias Voltage
Vdd (V)
5V
Idd (Typ.) (mA)
65
Control Voltage Table
State
Low
High
Vdd = +3V
0 to 0.5V @ <1 μA
2 to 3V @ <1 μA
Vdd = +5V
0 to 0.8V @ <1 μA
2 to 5V @ <1 μA
ELECTROSTATIC SENSITIVE DEVICE
OBSERVE HANDLING PRECAUTIONS
PUP Truth Table
LE
PUP1
PUP2
Gain Relative to
Maximum Gain
0
0
0
Insertion Loss
0
1
0
-8
0
0
1
-16
0
1
1
-23
1
X
X
0 to -23 dB
Note: Power-Up with LE= 1 provides direct parallel operation with
B4-B0.
Truth Table
ATTENUATION
B4^[1]
B3^[1]
B2
B1
B0
(dB)
0
0
0
0
0
0
1
0
0
0
0
1
2
0
0
0
1
0
3
0
0
0
1
1
4
0
0
1
0
0
5
0
0
1
0
1
6
0
0
1
1
0
7
0
0
1
1
1
8
0
1
0
0
0
9
0
1
0
0
1
10
0
1
0
1
0
11
0
1
0
1
1
12
0
1
1
0
0
13
0
1
1
0
1
14
0
1
1
1
0
15
0
1
1
1
1
16
1
X
0
0
0
17
1
X
0
0
1
18
1
X
0
1
0
19
1
X
0
1
1
20
1
X
1
0
0
21
1
X
1
0
1
22
1
X
1
1
0
23
1
X
1
1
1
[1] Enabling B4 disables B3, the minimum attenuation is 16 dB
12 - 42
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