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HMC674LP3E Datasheet, PDF (4/10 Pages) Hittite Microwave Corporation – 10 GHz LATCHED COMPARATOR WITH RSPECL OUTPUT STAGE
Timing Diagram
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HMC674LP3E
10 GHz LATCHED COMPARATOR
WITH RSPECL OUTPUT STAGE
1
Timing Descriptions
Symbol
tPDH
tPDL
tPLOH
tPLOL
tH
tPL
tS
tR
tF
VOD
Timing
Description
Input to output high delay
Propagation delay measured from the time the input signal crosses the reference
(± the input offset voltage) to the 50% point of an output low-to-high transition.
Input to output low delay
Propagation delay measured from the time the input signal crosses the reference
(± the input offset voltage) to the 50% point of an output high-to-low transition.
Latch enable to output high delay
Propagation delay measured from the 50% point of the latch enable signal low-to-high
transition to the 50% point of an output low-to-high transition.
Latch enable to output low delay
Propagation delay measured from the 50% point of the latch enable signal low-to-high
transition to the 50% point of an output high-to-low transition.
Minimum hold time
Minimum time after the positive transition of the latch enable signal that the input signal
must remain unchanged to be acquired and held at the outputs.
Minimum latch enable pulse width
Minimum time that the latch enable signal must be high to acquire an input signal
change.
Minimum setup time
Minimum time before the positive transition of the latch enable signal that an input
signal change must be present to be acquired and held at the outputs.
Output rise time
Amount of time required to transition from a low to a high output as measured at the
20% and 80% points.
Output fall time
Amount of time required to transition from a high to a low output as measured at the
20% and 80% points.
Voltage overdrive
Difference between the input voltages VINP and VINN-
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Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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