HMC1197LP7FE Datasheet, PDF (19/34 Pages) Hittite Microwave Corporation – Fixed Wireless or WLL

HMC1197LP7FE
v00.0912
WIDEBAND DIRECT QUADRATURE MODULATOR
w/ FRACTIONAL-N PLL & VCO, 100 - 4000 MHz
Reg 07h Lock Detect Configuration Register
BIT
TYPE
NAME
W DEFLT
[2:0]
R/W
Lock Detect Window Count
Max
3
4d
[13:3]
[11]
[13:12]
[14]
R/W
R/W
R/W
R/W
[15]
R/W
[19:16]
R/W
[20]
R/W
[21]
R/W
Reserved
Lock Detect Enable
Reserved
LD Mode
CSP Enable
Reserved
Lock Detect Training
Reserved
11
265d
109h
1
0
2
0
1
1
1
0
4
0
1
0
1
1
DESCRIPTION
Lock Detect window
sets the number of consecutive counts of divided VCO that must
land inside the Lock Detect Window to declare LOCK
0: 5
1: 32
2: 96
3: 256
4: 512
5: 2048
6: 8192
7: 65535
Reserved, Program to 108h
1: Enable Lock Detect
Reserved, Program to
1: Fixed to lock detect training Mode
Cycle Slip Prevention enable.
When enabled, if the phase error becomes larger than approx 70%
of the PFD period, the charge-pump gain is increased by approx
6mA for the duration of the cycle..
Reserved
0 to 1 transition triggers the training. Lock Detect Training is only
required after changing Phase Detector frequency. After changing
PD frequency a toggle Reg 07h[20] from 0 to 1 retrains the Lock
Detect.
Reserved
Reg 08h Analog Enable Register
BIT
TYPE
NAME
[20:0]
R/W
Reserved
[21]
R/W
Hi Frequency Reference
[22]
R/W
[23]
R/W
SDO Output Level
Reserved
W DEFLT
DESCRIPTION
21
114687d
1BFFFh
Reserved
1
0
Program 1 for XTAL > 200 MHz (sets low gain mode for high
frequency crystal buffer), 0 otherwise.
Output Logic Level on LD/SDO pin
1
0
0: 1.8 V Logic Levels
1: DVDD3V Logic Level
1
0
Reserved
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19
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