HN58X2402 Datasheet, PDF (9/21 Pages) Hitachi Semiconductor – Two-wire serial interface 2k / 4k / 8k / 16k / 32k / 64k EEPROM(8-kword x 8-bit)

HN58X2402/58X2404/58X2408/58X2416/58X2432/58X2464
Pin Connections for A0 to A2
Pin connection
Max connect
Memory size number
A2
A1
A0
Notes
2k bit
8
4k bit
4
8k bit
2
16k bit
1
V_CC/V_SS*¹ V_CC/V_SS
V_CC/V_SS V_CC/V_SS
V_CC/V_SS ×
×
×
V_CC/V_SS
×*²
×
×
Use A0 for memory address a8
Use A0, A1 for memory address a8 and a9
Use A0, A1, A2 for memory address a8, a9 and
a10
32k bit
8
V_CC/V_SS V_CC/V_SS V_CC/V_SS
64k bit
8
V_CC/V_SS V_CC/V_SS V_CC/V_SS
Notes: 1. “V_CC/V_SS” means that device address pin should be connected to V_CC or V_SS.
2. × = Don’t care (Open is also approval.)
Write Protect (WP)
When the Write Protect pin (WP) is high, the write protection feature is enabled and operates as shown in
the following table. When the WP is low, write operation for all memory arrays are allowed. The read
operation is always activated irrespective of the WP pin status. WP should be fixed high or low during
operations since WP does not provide a latch function.
Write Protect Area
Write protect area
WP pin status 2k bit
4k bit
V_IH
Upper 1/2
Upper 1/2
(1k bit)
(2k bit)
V_IL
Normal read/write operation
8k bit
Upper 1/2
(4k bit)
16k bit
Upper 1/2
(8k bit)
32k bit
Upper 1/4
(8k bit)
64k bit
Upper 1/4
(16k bit)
9